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參數資料
| 型號： | mc145193 |
| 廠商： | Motorola, Inc. |
| 英文描述： | PT06A SERIES (MS3116) STRAIGHT PLUGS, STRAIGHT BODY STYLE, SOLDER TERMINATION, 14 SHELL SIZE, 14-5 INSERT ARRANGEMENT, PLUG GENDER, 5 CONTACTS |
| 中文描述： | 1.1 GHz PLL頻率合成器 |
| 文件頁數： | 14/24頁 |
| 文件大小： | 240K |
| 代理商： | MC145193 |
M
1
M
S
A22
A21
A20
A19
A17
A15
A13
A12
A11
A10
A7
A6
A5
A4
A3
A1
Note 3
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
1
1
MSB
LSB
0
0
1
1
0
1
0
1
Port
Data Out
f
f
R
V
Binary
Value
Output A
Function
(Note 1)
Both Bits
Must Be
High
0
0
0
0
0
0
0
0
.
F
F
0
0
0
0
0
0
0
0
.
F
F
0
1
2
3
4
5
6
7
.
E
F
Not Allowed
Not Allowed
Not Allowed
Not Allowed
Not Allowed
N COUNTER = 5
N COUNTER = 6
N COUNTER = 7
N COUNTER = 4094
N COUNTER = 4095
Hexadecimal Value
For N Counter
0
0
0
0
.
3
3
4
0
1
2
3
.
E
F
0
A COUNTER =
A COUNTER =
A COUNTER =
A COUNTER =
0
1
2
3
A COUNTER =
A COUNTER =
Not Allowed
62
63
÷
÷
4
.
1
.
Not Allowed
Hexadecimal Value
For A Counter
F
F
Not Allowed
÷
÷
÷
÷
NOTES:
1. A power-on initialize circuit forces the Output A function to default to Data Out.
2. The values programmed for the N counter must be greater than or equal to the values programmed for the A counter. This results in a total divide value = N x 64 + A.
3. At this point, the three new bytes are transferred to the A register. In addition, the 13 LSBs in the first buffer of the R register are transferred to the R register’s second buffer.
Thus, the R, N, and A counters can be presented new divide ratios at the same time. The first buffer of the R register is not affected. The C register is not affected.
ENB
CLK
Din
F
Figure 15. A Register Access and Format
(24 Clock Cycles are Used)
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MC14519BCL | 制造商:Motorola Inc 功能描述: 制造商:Motorola Inc 功能描述:LOGIC MUX, QUAD, 2-INPUT, CMOS, 16 Pin, Ceramic, DIP |
| MC14519BD | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC14519BF | 制造商:Panasonic Industrial Company 功能描述:IC |
| MC1451CCP | 制造商:PMD 功能描述: |
| MC14520B | 制造商:Motorola Inc 功能描述: 制造商:ON Semiconductor 功能描述: |
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