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參數資料
| 型號： | MC14521BDR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 諧振器 |
| 英文描述： | 24-Stage Frequency Divider |
| 中文描述： | 4000/14000/40000 SERIES, PRESCALER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數： | 4/12頁 |
| 文件大小： | 219K |
| 代理商： | MC14521BDR2 |
MC14521B
http://onsemi.com
4
Characteristic
Symbol
(7.)
Vdc
Min
Typ
(8.)
Max
Unit
Output Rise and Fall Time (Counter Outputs)
t
TLH
, t
THL
= (1.5 ns/pF) C
L
+ 25 ns
t
TLH
, t
THL
= (0.75 ns/pF) C
L
+ 12.5 ns
t
TLH
, t
THL
= (0.55 ns/pF) C
L
+ 12.5 ns
t
TLH
, t
THL
5.0
10
15
—
—
—
100
50
40
200
100
80
ns
Propagation Delay Time
Clock to Q18
t
PHL
, t
PLH
= (1.7 ns/pF) C
L
+ 4415 ns
t
PHL
, t
PLH
= (0.66 ns/pF) C
L
+ 1667 ns
t
PHL
, t
PLH
= (0.5 ns/pF) C
L
+ 1275 ns
t
PHL
, t
PLH
5.0
10
15
—
—
—
4.5
1.7
1.3
9.0
3.5
2.7
μ
s
Clock to Q24
t
PHL
, t
PLH
= (1.7 ns/pF) C
L
+ 5915 ns
t
PHL
, t
PLH
= (0.66 ns/pF) C
L
+ 2167 ns
t
PHL
, t
PLH
= (0.5 ns/pF) C
L
+ 1675 ns
5.0
10
15
—
—
—
6.0
2.2
1.7
12
4.5
3.5
Propagation Delay Time
Reset to Q
n
t
PHL
= (1.7 ns/pF) C
L
+ 1215 ns
t
PHL
= (0.66 ns/pF) C
L
+ 467 ns
t
PHL
= (0.5 ns/pF) C
L
+ 350 ns
t
PHL
5.0
10
15
—
—
—
1300
500
375
2600
1000
750
ns
Clock Pulse Width
t
WH(cl)
5.0
10
15
385
150
120
140
55
40
—
—
—
ns
Clock Pulse Frequency
f
cl
5.0
10
15
—
—
—
3.5
9.0
12
2.0
5.0
6.5
MHz
Clock Rise and Fall Time
t
TLH
, t
THL
5.0
10
15
—
—
—
—
—
—
15
5.0
4.0
μ
s
Reset Pulse Width
t
WH(R)
5.0
10
15
1400
600
450
700
300
225
—
—
—
ns
Reset Removal Time
t
rem
5.0
10
15
30
0
– 40
– 200
– 160
– 110
—
—
—
ns
7. The formulas given are for the typical characteristics only at 25 C.
8. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
Figure 1. Power Dissipation Test Circuit and Waveform
PULSE
GENERATOR
V
DD
V
DD
V
DD
V
SS
V
SS
Q18
Q19
Q20
Q21
Q22
Q23
Q24
C
L
C
L
C
L
C
L
C
L
C
L
C
L
I
D
IN 2
R
500
μ
F
0.01
μ
F
CERAMIC
20 ns
20 ns
V
DD
0 V
V
in
50% DUTY CYCLE
90%
10%
50%
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