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參數資料
| 型號： | MC145484ENR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數： | 1/28頁 |
| 文件大小： | 0K |
| 描述： | IC CODEC-FILTER PCM 5V 20-SSOP |
| 標準包裝： | 1,500 |
| 類型： | PCM 編解碼器/濾波器 |
| 數據接口： | PCM 音頻接口 |
| 分辨率（位）： | 13 b |
| ADC / DAC 數量： | 1 / 1 |
| 三角積分調變： | 無 |
| 電壓 - 電源，數字： | 4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 20-SSOP |
| 包裝： | 帶卷 (TR) |
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MC145484
1
5 V PCM Codec-Filter
The MC145484 is a general purpose per channel PCM Codec–Filter with pin
selectable Mu–Law or A–Law companding, and is offered in 20–pin SOG,
SSOP, and TSSOP packages. This device performs the voice digitization and
reconstruction as well as the band limiting and smoothing required for PCM
systems. This device is designed to operate in both synchronous and
asynchronous applications and contains an on–chip precision reference
voltage.
This device has an input operational amplifier whose output is the input to the
encoder section. The encoder section immediately low–pass filters the analog
signal with an active R–C filter to eliminate very high frequency noise from being
modulated down to the passband by the switched capacitor filter. From the
active R–C filter, the analog signal is converted to a differential signal. From this
point, all analog signal processing is done differentially. This allows processing
of an analog signal that is twice the amplitude allowed by a single–ended
design, which reduces the significance of noise to both the inverted and
non–inverted signal paths. Another advantage of this differential design is that
noise injected via the power supplies is a common–mode signal that is
cancelled when the inverted and non–inverted signals are recombined. This
dramatically improves the power supply rejection ratio.
After the differential converter, a differential switched capacitor filter band–
passes the analog signal from 200 Hz to 3400 Hz before the signal is digitized
by the differential compressing A/D converter.
The decoder accepts PCM data and expands it using a differential D/A
converter. The output of the D/A is low–pass filtered at 3400 Hz and sinX/X
compensated by a differential switched capacitor filter. The signal is then filtered
by an active R–C filter to eliminate the out–of–band energy of the switched
capacitor filter.
The MC145484 PCM Codec–Filter has a high impedance VAG reference pin
which allows for decoupling of the internal circuitry that generates the
mid–supply VAG reference voltage, to the VSS power supply ground. This
reduces clock noise on the analog circuitry when external analog signals are
referenced to the power supply ground. This device is optimal for electronic
SLIC interfaces.
The MC145484 PCM Codec–Filter accepts a variety of clock formats,
including Short Frame Sync, Long Frame Sync, IDL, and GCI timing
environments. This device also maintains compatibility with Motorola’s family
of Telecommunication products, including the MC14LC5472 and MC145572
U–Interface Transceivers, MC145474/75 and MC145574 S/T–Interface Trans-
ceivers, MC145532 ADPCM Tr anscoder, MC145422/26 UDLT–1,
MC145421/25 UDLT–2, and MC3419/MC33120 SLICs.
The MC145484 PCM Codec–Filter utilizes CMOS due to its reliable
low–power performance and proven capability for complex analog/digital VLSI
functions.
Single 5 V Power Supply
Typical Power Dissipation of 15 mW, Power–Down of 0.01 mW
Fully–Differential Analog Circuit Design for Lowest Noise
Transmit Band–Pass and Receive Low–Pass Filters On–Chip
Active R–C Pre–Filtering and Post–Filtering
Mu–Law and A–Law Companding by Pin Selection
On–Chip Precision Reference Voltage of 1.575 V for a – 0 dBm TLP @ 600
Push–Pull 300 Power Drivers with External Gain Adjust
MC14LC5480EVK is the Evaluation Kit for This Device
Order this document
by MC145484/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
PIN ASSIGNMENT
MC145484
DW SUFFIX
SOG PACKAGE
CASE 751D
ORDERING INFORMATION
MC145484DW
SOG Package
MC145484SD
SSOP
MC145484DT
TSSOP
20
1
VDD
PO-
PI
RO-
VAG Ref
PDI
BCLKR
DR
FSR
PO+
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
Mu/A
TG
TI-
TI+
VAG
MCLK
BCLKT
DT
FST
VSS
SD SUFFIX
SSOP
CASE 940C
20
1
20
1
DT SUFFIX
TSSOP
CASE 948E
REV 2
3/98
TN98031100
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MC145484SD | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC145484SDR2 | 功能描述:IC 5V PCM CODEC-FILTER 20-SSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數據接口:串行 分辨率（位）:18 b ADC / DAC 數量:2 / 2 三角積分調變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| MC14549BCP | 功能描述:寄存器 3-18V SAR RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| MC14549BCPG | 功能描述:寄存器 3-18V SAR RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| MC14549BDWR2 | 功能描述:寄存器 3-18V SAR RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
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