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參數(shù)資料
| 型號： | MC14549BDWR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 0K |
| 描述： | IC REGISTER 8BIT APPROX 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | 4000B |
| 邏輯類型： | 逐次近似寄存器 |
| 輸出類型： | 標(biāo)準(zhǔn) |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 8 |
| 功能： | 通用 |
| 電源電壓： | 3 V ~ 18 V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
Semiconductor Components Industries, LLC, 2011
June, 2011 Rev. 7
1
Publication Order Number:
MC14549B/D
MC14549B, MC14559B
Successive Approximation
Registers
The MC14549B and MC14559B successive approximation
registers are 8bit registers providing all the digital control and storage
necessary for successive approximation analogtodigital conversion
systems. These parts differ in only one control input. The Master Reset
(MR) on the MC14549B is required in the cascaded mode when more
than 8 bits are desired. The Feed Forward (FF) of the MC14559B is
used for register shortening where EndofConversion (EOC) is
required after less than eight cycles.
Applications for the MC14549B and MC14559B include
analogtodigitalconversion, with serial and parallel outputs.
Features
Totally Synchronous Operation
All Outputs Buffered
Single Supply Operation
Serial Output
Retriggerable
Compatible with a Variety of Digital and Analog Systems such as the
MC1408 8Bit D/A Converter
All Control Inputs PositiveEdge Triggered
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving 2 LowPower TTL Loads, 1 LowPower Schottky
TTL Load or 2 HTL Loads Over the Rated Temperature Range
Chip Complexity: 488 FETs or 122 Equivalent Gates
These Devices are PbFree and are RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to VSS)
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
VDD
0.5 to +18.0
V
Input Voltage Range, All Inputs
Vin
0.5 to VDD + 0.5
V
DC Input Current per Pin
Iin
±10
mA
Power Dissipation per Package (Note 1)
PD
500
mW
Operating Temperature Range
TA
55 to +125
°C
Storage Temperature Range
Tstg
65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
highimpedance circuit. For proper operation, Vin and Vout should be constrained to
the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD).
x
= 4 or 5
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G
= PbFree Package
MARKING
DIAGRAMS
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
Q0
Q1
Q2
Q3
VDD
SC
*
EOC
Q7
Q6
Q5
Q4
VSS
C
D
Sout
*For MC14549B Pin 10 is MR input.
For MC14559B Pin 10 is FF input.
PDIP16
P SUFFIX
CASE 648
16
1
MC145x9BCP
AWLYYWWG
1
SO16WB
DW SUFFIX
CASE 751G
16
1
MC145x9B
AWLYYWWG
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