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參數資料
| 型號： | MC1670L |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Master-Slave Flip-Flop |
| 中文描述： | 1000 SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 76K |
| 代理商： | MC1670L |
SEMICONDUCTOR TECHNICAL DATA
4–356
REV 5
Motorola, Inc. 1996
3/93
Master slave construction renders the MC1670 relatively insensitive to the
shape of the clock waveform, since only the voltage levels at the clock inputs
control the transfer of information from data input (D) to output.
When both clock inputs (C1 and C2) are in the low state, the data input
affects only the “Master” portion of the flip-flop. The data present in the “Master”
is transferred to the “Slave” when clock inputs (C1 “OR” C2) are taken from a
low to a high level. In other words, the output state of the flip-flop changes on the
positive transition of the clock pulse.
While either C1 “OR” C2 is in the high state, the “Master” (and data input) is
disabled.
Asynchronous Set (S) and Reset (R) override Clock (C) and Data (D) inputs.
Power Dissipation = 220 mW typ (No Load)
fTog = 350 MHz typ
TRUTH TABLE
R
S
D
C
Qn+1
H
L
N.D.
Qn
L
Qn
Qn
H
Qn
L
H
H
L
L
L
L
L
L
H
L
H
L
L
L
L
L
L
X
X
X
L
L
L
H
H
H
X
X
X
L
H
H
L
ND = Not Defined
C = C1 + C2
ELECTRICAL CHARACTERISTICS
Characteristic
Power Supply Drain Current
Input Current
Set, Reset
Clock
Data
Switching Times
Propagation Delay
i i
Symbol
IE
IinH
b l
–30
°
C
Min
—
+25
°
C
Min
—
+85
°
C
Min
—
U i
Unit
mAdc
μ
Adc
Max
—
Max
48
Max
—
—
—
—
—
—
—
—
—
—
550
250
270
—
—
—
—
—
—
tpd
t +
t –
tS“1”
tS“0”
tH“1”
tH“0”
fTog
1.0
0.9
0.5
—
—
2.7
2.7
2.1
—
—
1.1
1.0
0.6
0.4
0.5
2.5
2.5
1.9
—
—
1.1
1.0
0.6
—
—
2.9
2.9
2.3
—
—
ns
Rise Time (10% to 90%)
Fall Time (10% to 90%)
Setup Time
ns
ns
ns
Hold Time
—
—
—
—
0.3
0.5
—
—
—
—
—
—
ns
Toggle Frequency
270
—
300
—
270
—
MHz
LOGIC DIAGRAM
S
C1
C2
D
R
Q
Q
VCC1 = Pin 1
VCC2 = Pin 16
VEE = Pin 8
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VCC1
Q
Q
RESET
SET
NC
VEE
VCC2
NC
NC
NC
NC
DATA
NC
CLOCK 2
CLOCK 1
5
7
9
11
4
2
3
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
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