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參數資料
型號: MC44002
廠商: Motorola, Inc.
英文描述: CHROMA 4 VIDEO PROCESSOR
中文描述: 色度4視頻處理器
文件頁數: 19/40頁
文件大小: 491K
代理商: MC44002
MC44002 MC44007
19
MOTOROLA ANALOG IC DEVICE DATA
In order to implement automatic beam current limiting
(BCL), the possibility of fast contrast reduction has been
added. For normal operation, the Contrast control is
achieved by auto grey scale output loops and is I2C bus
controlled (see Section 4). In the case of excess beam
current, this control is not fast enough to protect the tube and
power supply stages. It is now possible, by acting on the
Pin 10 voltage, to reduce the contrast about 12 dB by
reducing the luma gain and saturation. In the case of direct
RGB mode, the RGB gains are also reduced.
Figure 11. Typical Contrast Reduction
PIN 10 VOLTAGE (V)
0
1.0
2.0
3.0
4.0
5.0
1.0
–1.0
–3.0
–5.0
–7.0
–9.0
–11
–13
R
Figure 11 is showing the typical analog CONTRAST
reduction possible as a function of the voltage on Pin 10. Two
solutions are possible for obtaining the BCL function:
1st solution:A measure of the average and/or peak beam
current is applied to Pin 10, which causes a reduction of the
RGB drive levels to the high voltage video amplifiers. In this
case, no software control is required, but variations in color
balance and saturation may be observed. A typical
application is shown in Figure 12.
2nd solution:The beam current flags are read and acted
on by the MCU, which reduces the I2C bus CONTRAST
control to maintain the average beam current below the
desired level. In the case of rapid and extreme beam current
changes (black to white picture at high contrast level), the
circuit of Figure 12 may be used as a fast aging protection
while the MCU is reducing the CONTRAST through I2C bus.
The average of this method is to make any color
balance/saturation variation only transient.
Figure 12. Automatic Beam
Current Limiter Application
EHT
470 n
270 k
R8
R9
1.0 M
R4
10 k
R1
C2
C3
12 V
2.2 M
C5
C1
10 n
R3
33 k
10 n
4.7
μ
D1
1N4148
9
10
Auto Gray Scale Control Loops
This section supplies current drives to the RGB cathode
amplifiers and receives a signal feedback from them,
proportional to the combined cathode currents. The current
feedback is used to establish a set of feedback loops to
control the dc level of the cathode voltage (cut–off), and gain
of the signal at the cathode (white balance). There are three
loops to control the dark currents dark loops and another
three to control the gains bright loops. The system uses 3
lines at the end of the vertical suppression period and just
before the beginning of the picture for sampling the cathode
current (i.e., one line for red, one for green and one for blue).
The first half of reach line is used for adjusting the gain of the
channel and is usually called the “bright” adjustment period.
The second half of the line is used for adjusting the dc level of
the channel and is called the “dark” adjustment.
The theoretical circuit diagram for one channel is shown in
Figure 13 along with the basic equations. The dc level (ldc)
and gain (G) are both controlled by 7 bit DACs which receive
data directly from latches in which the required values are
stored between sampling periods.
Figure 13. Bright/Dark Current Control
Brightness (B)
ICont
Pins 17,
18 or 19
Bright
Dark
Bright
Dark
IPict
Gain (G)
Output Buffer (A)
IO
IDC
Picture Output Current: IO(Pict) = A x [ IDC = G x ((B x ICont) + IPict)]
Dark Sample Output Current: IO(dk) = A x IDC
Bright Sample Output Current: IO(br) = IO(dk) – A x G X ICont
Black Level Output Current: IO(bk) = IO(dk) – B x A x G x ICont
Black Level Output Current: IO(bk)
= IO(dk) x B x [IO(dk) – IO(br)]
A block diagram of the complete system is illustrated in
Figure 16. Data words from the MCU which represent the
RGB color temperatures selected at the factory, are stored in
Latches 1,2,3 and D/A converted by DAC1,2,3 to reference
currents. During the bright adjustment period, a reference
current pulse, whose amplitude depends on the Contrast
setting, is output to the cathode of the tube. The gain control
is adjusted to bring the feedback current to the same value as
the bright reference current, which is defined by the color
intensity setting of the output considered. The currents must
match each other. If not, a current will flow in resistor R
producing an error voltage. This is then buffered into
comparators Comp1, 2 and is compared with voltage
references Vref1 and Vref2. If the error voltage is greater than
Vref1, Comp1 causes the counter to count up. If the error
voltage is less than Vref2, Comp2 sends a count-down
command. In this way, a “deadband” is set up to prevent the
outputs from continuously changing. With the color intensity
DAC set to about 32d, the bright cathode current is 100
μ
A
(10 times the dark current).
During Load the contents of the counter are loaded into
Latch 6 (for red dc) and then D/A converted. The resulting dc
current is then applied as an offset to the red output amplifier,
completing the loop. During the dark adjustment period, the
same intensity data is used but divided by a common factor
(typically 10). A black level reference pulse is applied and the
feedback loop adjusts the dc levels of the cathode to obtain a
set of cathode currents equal to the dark reference currents
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