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參數資料
| 型號： | MC54HC688J |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Bit Equality Comparator |
| 中文描述： | HC/UH SERIES, 8-BIT IDENTITY COMPARATOR, INVERTED OUTPUT, CDIP20 |
| 封裝： | CERAMIC, DIP-20 |
| 文件頁數： | 2/6頁 |
| 文件大?。?/td> | 202K |
| 代理商： | MC54HC688J |
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
500
Storage Temperature
SOIC Package
– 65 to + 150
C
(Plastic DIP or SOIC Package)
260
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
0
400
VCC = 6.0 V
(Voltages Referenced to GND)
Guaranteed Limit
VCC
– 55 to
4.2
4.2
4.2
6.0
VIL
Maximum Low–Level Input
Vout = 0.1 V or VCC – 0.1 V
2.0
6.0
0.3
1.2
0.3
1.2
0.3
1.2
VOH
Minimum High–Level Output
Vin = VIH or VIL
2.0
1.9
1.9
1.9
V
5.2 mA
5.48
5.34
5.20
V
VOL
Maximum Low–Level Output
Vin = VIH or VIL
|Iout|
6.0
2.0
0.1
0.1
0.1
5.2 mA
0.26
0.33
0.40
V
Iin
Maximum Input Leakage Current
Vin = VCC or GND
|Iout|
6.0
6.0
±
0.1
±
1.0
±
1.0
μ
A
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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