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參數資料
型號: MC54HCT00AJ
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Quad 2-Input NAND Gate with LSTTL-Compatible Inputs
中文描述: HCT SERIES, QUAD 2-INPUT NAND GATE, CDIP14
封裝: CERAMIC, DIP-14
文件頁數: 1/5頁
文件大小: 172K
代理商: MC54HCT00AJ
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
$ !$# # %#
!# !$#"
High–Performance Silicon–Gate CMOS
The MC54/74HCT00A may be used as a level converter for interfacing
TTL or NMOS outputs to high–speed CMOS inputs.
The HCT00A is identical in pinout to the LS00.
Output Drive Capability: 10 LSTTL Loads
TTL/NMOS–Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0
μ
A
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 48 FETs or 12 Equivalent Gates
LOGIC DIAGRAM
3
Y1
1
A1
PIN 14 = VCC
PIN 7 = GND
2
B1
Y4
Y = AB
6
Y2
4
A2
5
B2
8
Y3
9
A3
10
B3
11
12
A4
13
B4
3
FUNCTION TABLE
PIN ASSIGNMENT
11
12
13
14
8
9
10
5
4
3
2
1
7
6
B3
Y4
A4
B4
VCC
Y3
A3
A2
Y1
B1
A1
GND
Y2
B2
A
L
L
H
H
Inputs
B
L
H
L
H
Output
Y
H
H
H
L
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ORDERING INFORMATION
MC54HCTXXAJ
MC74HCTXXAN
MC74HCTXXAD
Ceramic
Plastic
SOIC
1
14
1
14
J SUFFIX
CERAMIC PACKAGE
CASE 632–08
1
14
相關PDF資料
PDF描述
MC74HCT74AN Dual D Flip-Flop with Set and Reset with LSTTL Compatible Inputs
MC74HCT74AD Dual D Flip-Flop with Set and Reset with LSTTL Compatible Inputs
MC74HCT74ADR2 Dual D Flip-Flop with Set and Reset with LSTTL Compatible Inputs
MC74HCT00AD Quad 2-Input NAND Gate with LSTTL-Compatible Inputs
MC74HCT00AN Quad 2-Input NAND Gate with LSTTL-Compatible Inputs
相關代理商/技術參數
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