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參數資料
型號: MC54HCT08A
廠商: Motorola, Inc.
英文描述: Quad 2-Input AND Gate with LSTTL-Compatible Inputs
中文描述: 四2輸入與門的輸入通道兼容輸入
文件頁數: 3/5頁
文件大小: 170K
代理商: MC54HCT08A
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
tPHL
tTLH,
Maximum Output Transition Time, Any Output
1, 2
15
19
22
Speed CMOS Data Book (DL129/D).
ns
CPD
Power Dissipation Capacitance (Per Gate)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
20
pF
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
EXPANDED LOGIC DIAGRAM
(1/4 OF THE DEVICE)
Y
A
B
Figure 1. Switching Waveforms
Figure 2. Test Circuit
OUTPUT Y
INPUT
A OR B
90%
1.3 V
10%
tTLH
tTHL
tPLH
tPHL
tr
tf
GND
3.0 V
90%
1.3 V
10%
相關PDF資料
PDF描述
MC74HCT08A Quad 2-Input AND Gate with LSTTL-Compatible Inputs
MC54HCT08 Quad 2-Input AND Gate with LSTTL-Compatible Inputs
MC74HCT08AD Quad 2-Input AND Gate with LSTTL-Compatible Inputs
MC54HCT08AJ Quad 2-Input AND Gate with LSTTL-Compatible Inputs
MC74HCT08AN Quad 2-Input AND Gate with LSTTL-Compatible Inputs
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