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參數(shù)資料
型號: MC56F8357
廠商: Electronic Theatre Controls, Inc.
英文描述: 16-BIT HYBRID CONTROLLERS
中文描述: 16位混合控制器
文件頁數(shù): 70/160頁
文件大小: 1394K
代理商: MC56F8357
70
56F8357 Technical Data
Preliminary
5.3.3
Fast interrupts are described in the
DSP56800E Reference Manual
. The interrupt controller
recognizes fast interrupts before the core does.
Fast Interrupt Handling
A fast interrupt is defined (to the ITCN) by:
1. Setting the priority of the interrupt as level 2, with the appropriate field in the IPR registers
2. Setting the FIMn register to the appropriate vector number
3. Setting the FIVALn and FIVAHn registers with the address of the code for the fast interrupt
When an interrupt occurs, its vector number is compared with the FIM0 and FIM1 register values.
If a match occurs, and it is a level 2 interrupt, the ITCN handles it as a fast interrupt. The ITCN
takes the vector address from the appropriate FIVALn and FIVAHn registers, instead of generating
an address that is an offset from the VBA.
The core then fetches the instruction from the indicated vector adddress and if it is not a JSR, the
core starts its fast interrupt handling.
Table 5-2. Interrupt Priority Encoding
IPIC_LEVEL[1:0]
1
1.
See IPIC field definition in
Section 5.6.30.2
Current Interrupt Priority
Level
Required Nested
Exception Priority
00
No Interrupt or SWILP
Priorities 0, 1, 2, 3
01
Priority 0
Priorities 1, 2, 3
01
Priority 1
Priorities 2, 3
11
Priorities 2 or 3
Priority 3
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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