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參數(shù)資料
型號: MC56F8357VPY60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 16-bit Digital Signal Processor
中文描述: 16-BIT, 240 MHz, OTHER DSP, PQFP160
封裝: 24 X 24 MM, 0.50 MM PITCH, PLASTIC, LQFP-160
文件頁數(shù): 22/160頁
文件大小: 1394K
代理商: MC56F8357VPY60
22
56F8357 Technical Data
Preliminary
RXD1
(GPIOD7)
50
Input
Input/
Output
Input
Input
Receive Data
— SCI1 receive data input
Port D GPIO
— This GPIO pin can be individually
programmed as an input or output pin.
After reset, the default state is SCI input.
To deactivate the internal pull-up resistor, clear bit 7 in the
GPIOD_PUR register.
TCK
137
Schmitt
Input
Input,
pulled low
internally
Test Clock Input
— This input pin provides a gated clock
to synchronize the test logic and shift serial data to the
JTAG/EOnCE port. The pin is connected internally to a
pull-down resistor.
TMS
138
Schmitt
Input
Input,
pulled high
internally
Test Mode Select Input
— This input pin is used to
sequence the JTAG TAP controller’s state machine. It is
sampled on the rising edge of TCK and has an on-chip
pull-up resistor.
To deactivate the internal pull-up resistor, set the JTAG bit
in the SIM_PUDR register.
TDI
139
Schmitt
Input
Input,
pulled high
internally
Test Data Input
— This input pin provides a serial input
data stream to the JTAG/EOnCE port. It is sampled on the
rising edge of TCK and has an on-chip pull-up resistor.
To deactivate the internal pull-up resistor, set the JTAG bit
in the SIM_PUDR register.
TDO
140
Output
Tri-stated
Test Data Output
— This tri-stateable output pin provides
a serial output data stream from the JTAG/EOnCE port. It
is driven in the shift-IR and shift-DR controller states, and
changes on the falling edge of TCK.
TRST
136
Schmitt
Input
Input,
pulled high
internally
Test Reset
— As an input, a low signal on this pin
provides a reset signal to the JTAG TAP controller. To
ensure complete hardware reset, TRST should be
asserted whenever RESET is asserted. The only
exception occurs in a debugging environment when a
hardware device reset is required and the JTAG/EOnCE
module must not be reset. In this case, assert RESET, but
do not assert TRST.
To deactivate the internal pull-up resistor, set the JTAG bit
in the SIM_PUDR register.
Table 2-2 56F8357 Signal and Package Information for the 160-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關PDF資料
PDF描述
MC68000 Integrated Multiprotocol Processor User’s Manual
MC68302PV16V Integrated Multiprotocol Processor User’s Manual
MC68302PV20 Integrated Multiprotocol Processor User’s Manual
MC68302RC20 Integrated Multiprotocol Processor User’s Manual
MC68302RC25 Integrated Multiprotocol Processor User’s Manual
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