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參數(shù)資料
| 型號(hào)： | MC68176 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 2-bit A/D Converter(2位A/D轉(zhuǎn)換器) |
| 中文描述： | 2位A / D轉(zhuǎn)換器（2位的A / D轉(zhuǎn)換器） |
| 文件頁(yè)數(shù)： | 11/29頁(yè) |
| 文件大小： | 235K |
| 代理商： | MC68176 |
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Specifications
Peak and Valley DAC
Preliminary
MOTOROLA
MC68176 Technical Data Sheet
2-3
PEAK AND VALLEY DAC
SWITCH CAPACITOR FILTER
Table 2-4
Peak and Valley DAC
Spec.
Characteristic
Symbol
Min
Typ
Max
Unit
20
21
22
Specification Deleted
DAC output voltage
Step Size (input
referred)
Differential Linearity
Min/ Max Full Scale
Error
Zero Code Error
Voltage Output Drift,
Hold mode
—
LSB
IV
AG
128 LSB
—
IV
AG
+ 128 LSB
V
V
0.3367
×
V
ADD
/ 255 ± 1%
23
24
—
—
—
—
—
—
1
1
LSB
LSB
25
26
—
—
—
—
—
—
7
LSB
mV /
mS
0.0
Note:
IV
AG
= (V
ADD
/ 2) ± 1%
Table 2-5
Switch Capacitor Filter
Spec.
Characteristic
Symbol
Min
Typ
Max
Unit
27
28
29
30
31
32
33
Pass Band Gain (V
ADD
SEL = 0)
Pass Band Gain (V
ADD
SEL = 1)
Cutoff Frequency, – 3 dB, BW = 1
Cutoff Frequency, – 3 dB, BW = 0
Stabilization time, off mode to hold mode
Analog Input Impedance (f
IN
= 10 kHz)
ADIN Voltage Range (See Note)
—
—
—
—
—
Z
IN
ADIN
11.16
7.64
1.95
0.95
—
1.0
0.0
11.26
7.74
2.0
1.0
—
—
—
11.36
7.84
2.05
1.05
5.0
—
V
ADD
dB
dB
kHz
kHz
mS
M
V
Note:
Although the voltage on ADIN may be any value in the range specified, the actual maximum permitted ac
signal peak is given by:
V
ADIN-peak
= 0.410
×
V
ADD
/ SCFGAIN
V
difoffset
where
V
difoffset
V
ADoffset
V
DC-OFFSET
= |V
ADoffset
V
DC-OFFSET
| (absolute value of error in signal DC-OFFSET)
= Actual dc offset of analog signal presented on ADIN
= dc value present as signal DC-OFFSET
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