
SCC Programming Reference
MOTOROLA
MC68360 USER’S MANUAL
E-13
I—Interrupt
0 = The TXB bit in the event register is not set when this buffer is closed.
1 = The TXB bit in the event register is set if this buffer closed without an error. If an
error occurred, then TXE is set.
L—Last in Frame
0 = This buffer is not the last buffer in a frame.
1 = This buffer is the last buffer in a frame.
TC—Tx CRC
0 = Transmit the closing flag after the last data byte.
1 = Transmit the CRC sequence after the last data byte.
Bits 9-2—Reserved for future use
UN—Underrun
0 = No transmitter underrun occurred.
1 = A transmitter underrun condition occurred while transmitting the associated data
buffer.
CT—CTS Lost
0 = No CTS or L1GR lost was detected during frame transmission.
1 = CTS in NMSI mode or L1GR in IDL/GCI mode was lost during frame transmission.
E.1.1.5.2 Transmit Buffer Data Length.
the number of data bytes to be transmitted from the data butter.
This 16-bit value is written by the user to indicate
E.1.1.5.3 Transmit Buffer Pointer.
address of the first byte of data in the data buffer.
This 32-bit value is written by the user to indicate the
E.1.2 Programming the SCC for HDLC
This section gives a generic algorithm for programming an SCC to handle HDLC. The algo-
rithm is intended to show what must be done and in what order to initialize the SCC and pre-
pare the SCC for transmission and reception. The algorithm is not specific and assumes that
the lMP and other on-chip peripherals have been initialized as required by the system hard-
ware (timers, chip selects, etc.).
E.1.2.1 CP INITIALIZATION.
1. Write the port A and port B control registers (PACNT and PBCNT) to configure SCC2
or SCC3 serial interface pins as peripheral pins, if SCC2 or SCC3 is used.
2. Write SIMODE to configure the SCCs physical interface.
3. Write SIMASK if IDL or GCI multiplexed mode was selected in SIMODE.
E.1.2.2 GENERAL AND HDLC PROTOCOL-SPECIFIC RAM INITIALIZATION.
4. Write RFCR/TFCR.