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參數資料
| 型號： | MC68332GCFC20 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-Bit Modular Microcontroller |
| 中文描述： | 32-BIT, 20.97 MHz, MICROCONTROLLER, PQFP132 |
| 封裝： | PLASTIC, QFP-132 |
| 文件頁數： | 84/88頁 |
| 文件大小： | 446K |
| 代理商： | MC68332GCFC20 |
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MOTOROLA
84
MC68332
MC68332TS/D
7 Standby RAM with TPU Emulation RAM
The TPURAM module contains a 2-Kbyte array of fast (two bus cycle) static RAM, which is especially
useful for system stacks and variable storage. Alternately, it can be used by the TPU as emulation RAM
for new timer algorithms.
7.1 Overview
The TPURAM can be mapped to any 4-Kbyte boundary in the address map, but must not overlap the
module control registers. (Overlap makes the registers inaccessible.) Data can be read or written in
bytes, word, or long words. TPURAM responds to both program and data space accesses. Data can be
read or written in bytes, words, or long words. The TPURAM is powered by V
DD
in normal operation.
During power-down, the TPURAM contents are maintained by power on standby voltage pin V
STBY
.
Power switching between sources is automatic.
Access to the TPURAM array is controlled by the RASP field in TRAMMCR. This field can be encoded
so that TPURAM responds to both program and data space accesses. This allows code to be executed
from TPURAM, and permits the use of program counter relative addressing mode for operand fetches
from the array.
An address map of the TPURAM control registers follows. All TPURAM control registers are located in
supervisor data space.
Y = M111, where M is the logic state of the MM bit in the SIMCR.
7.2 TPURAM Register Block
There are three TPURAM control registers: the RAM module configuration register (TRAMMCR), the
RAM test register (TRAMTST), and the RAM array base address registers (TRAMBAR).
There is an 8-byte minimum register block size for the module. Unimplemented register addresses are
read as zeros, and writes have no effect.
7.3 TPURAM Registers
TSTOP —Stop Control
0 = RAM array operates normally.
1 = RAM array enters low-power stop mode.
This bit controls whether the RAM array is in stop mode or normal operation. Reset state is zero, for
normal operation. In stop mode, the array retains its contents, but cannot be read or written by the CPU.
Table 28 TPURAM Control Register Address Map
Access
S
S
S
Address
$YFFB00
$YFFB02
$YFFB04
$YFFB06–
$YFFB3F
15
8 7
0
TPURAM MODULE CONFIGURATION REGISTER (TRAMMCR)
TPURAM TEST REGISTER (TRAMTST)
TPURAM BASE ADDRESS REGISTER (TRAMBAR)
NOT USED
TRAMMCR
—TPURAM Module Configuration Register
$YFFB00
15
14
13
12
11
10
9
8
7
0
STOP
0
0
0
0
0
0
RASP
NOT USED
RESET:
0
0
0
0
0
0
0
1
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相關代理商/技術參數 |
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| MC68332GCPV16 | 功能描述:IC MCU 32BIT 16MHZ GMASK 144LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M683xx 其它有關文件:STM32F101T8 View All Specifications 特色產品:STM32 32-bit Cortex MCUs 標準包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數:26 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數據轉換器:A/D 10x12b 振蕩器型:內部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
| MC68332GCPV16B1 | 功能描述:IC MCU 32BIT 16MHZ 144-LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M683xx 標準包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設備:POR，PWM，溫度傳感器，WDT 輸入/輸出數:21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數據轉換器:A/D 6x12b 振蕩器型:內部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
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