- 您現在的位置：買賣IC網 > PDF目錄371044 > MC68360CFE25 (MOTOROLA INC) QUad Integrated Communications Controller Users Manual PDF資料下載
參數資料
| 型號： | MC68360CFE25 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | QUad Integrated Communications Controller Users Manual |
| 中文描述： | 32-BIT, 25 MHz, RISC MICROCONTROLLER, CQFP240 |
| 封裝： | CERAMIC, QFP-240 |
| 文件頁數： | 3/28頁 |
| 文件大小： | 159K |
| 代理商： | MC68360CFE25 |
第1頁第2頁當前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
MOTOROLA
MC68360 USER’S MANUAL ERRATA
3
are not correct, the correct text is below.
“The equations of the byte write enables for 32-bit port (DPS/SPS set to 32 bit) are as
follows:”
“The equations of the byte write enables for 16-bit port (DPS/SPS set to 16 bit) are as
follows:”
Also in the same section the first sentence of the note:
“Note that the WE signals are not affected by dynamic bus sizing.” is not correct and should
be removed.
2. Error in slave mode bus arbitration diagram.
On page 4-56, figure 4-38 an arrow head and text was missing.
The line top line between “QUICC waiting for bus, BR asserted” and “IDLE” state should
have an arrow head facing the IDLE state.
Also on the same figure, the Idle state should have a test of “BG Negated” under the text of
“BR Negated”.
3. Power on reset operation
On page 4-65, the note “User should make sure the ramp up time of Vcc never be faster
than 4mSec to ensure proper power on reset sequence. “This restriction has been removed
and the note should be deleted.
NOTE for Rev C.0
Due to a problem with Revision C.0 of the QUICC (masks
0E63C and 0F15W), a 4ms minimum Vcc ramp-up specification
was added. Characterization of Revision C.1 QUICCs (masks
1E68C and 0E68C) has demonstrated that this specification is
no longer necessary.
Users of Revision C.0 QUICCs should remain aware of this po-
tential problem source. Revision C.0 QUICCs used in systems
with very fast ramp-up times may experience problems at pow-
er-on reset. When the problem occurs, the QUICC never comes
out of reset and no bus activity occurs (similar to latch-up, but
without the high current drain). If the problem occurs, the only
solution is powering the device down and reapplying power (i.e.
another power-on reset).
Hardware reset (RESETH) will not solve the problem.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關PDF資料 |
PDF描述 |
|---|---|
| MC68360CRC25 | QUad Integrated Communications Controller Users Manual |
| MC68360FE25 | QUad Integrated Communications Controller Users Manual |
| MC68360FE25V | QUad Integrated Communications Controller Users Manual |
| MC68360FE33 | QUad Integrated Communications Controller Users Manual |
| MC68360RC25 | QUad Integrated Communications Controller Users Manual |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC68360CRC25 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:QUad Integrated Communications Controller Users Manual |
| MC68360CRC25L | 功能描述:微處理器 - MPU QUICC SIM 4SCC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC68360CVR25L | 功能描述:微處理器 - MPU QUICC SIM 4SCC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC68360CVR25LR2 | 功能描述:微處理器 - MPU QUICC SIM 4SCC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC68360CZP25L | 功能描述:IC MPU QUICC 25MHZ 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，FCBGA 供應商設備封裝:783-FCPBGA（29x29） 包裝:托盤 |
發布緊急采購，3分鐘左右您將得到回復。