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參數(shù)資料
| 型號(hào)： | MC68HC11K0VFN2 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC84 |
| 封裝： | PLASTIC, LCC-84 |
| 文件頁(yè)數(shù)： | 55/80頁(yè) |
| 文件大小： | 420K |
| 代理商： | MC68HC11K0VFN2 |
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M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
55
PF —Parity Error Flag
PF is set if received data has incorrect parity. Clear PF by reading SCSR1 and then reading SCDR.
0 = Parity correct
1 = Incorrect parity detected
Bits [7:1] —Not implemented
Always read zero
RAF —Receiver Active Flag (Read Only)
0 = A character is not being received
1 = A character is being received
R8 —Receiver Bit 8
Ninth serial data bit received when SCI is configured for nine-data-bit operation.
T8 —Transmitter Bit 8
Ninth serial data bit transmitted when SCI is configured for nine-data-bit operation.
Bits [5:0] —Not implemented
Always read zero
R/T[7:0] —Receiver/Transmitter Data Bits [7:0]
SCI data is double buffered in both directions.
SCSR2
—SCI Status Register 2
$0075
Bit 7
6
5
4
3
2
1
Bit 0
—
—
—
—
—
—
—
RAF
RESET:
0
0
0
0
0
0
0
0
SCDRH, SCDRL
—SCI Data Register High/Low
$0076, $0077
Bit 7
6
5
4
3
2
1
Bit 0
$0076
R8
T8
—
—
—
—
—
—
SCDRH
(High)
$0077
R7/T7
R6/T6
R5/T5
R4/T4
R3/T3
R2/T2
R1/T1
R0/T0
SCDRL
(Low)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC11K0VFN3 | 8-BIT MICROCONTROLLER |
| MC68HC11K0VFN4 | 8-BIT MICROCONTROLLER |
| MC68HC11K0VFU2 | 8-BIT MICROCONTROLLER |
| MC68HC11K0VFU3 | 8-BIT MICROCONTROLLER |
| MC68HC11K0VFU4 | 8-BIT MICROCONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC11K0VFN3 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Technical Summary 8-Bit Microcontroller |
| MC68HC11K0VFN4 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-Bit Microcontroller |
| MC68HC11K0VFU2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-Bit Microcontroller |
| MC68HC11K0VFU3 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-Bit Microcontroller |
| MC68HC11K0VFU4 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-Bit Microcontroller |
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