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參數資料
| 型號： | MC68HC11KA4TS |
| 廠商： | Motorola, Inc. |
| 英文描述： | KPT 3C 3#16 PIN PLUG |
| 中文描述： | 8位微控制器 |
| 文件頁數： | 29/68頁 |
| 文件大小： | 365K |
| 代理商： | MC68HC11KA4TS |
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MC68HC11KA4
MC68HC11KA4TS/D
MOTOROLA
29
PSEL[4:0] — Priority Select Bits [4:0]
Can be written only while bit I in the CCR is set (interrupts disabled). These bits select one interrupt
source to be elevated above all other I-bit related sources.
CONFIG is made up of EEPROM cells and static latches. The operation of the MCU is controlled directly
by these latches and not the actual EEPROM byte. When programming the CONFIG register, the EE-
PROM byte is being accessed. When the CONFIG register is being read, the static latches are being
accessed.
These bits can be read at any time. The value read is the one latched into the register from the EE-
PROM cells during the last reset sequence. A new value programmed into this register cannot be read
until after a subsequent reset sequence. Unused bits always read as ones.
If SMOD = 1, CONFIG bits can be written at any time. If SMOD = 0 CONFIG bits can only be written
using the EEPROM programming sequence, and are neither readable nor active until latched via the
next reset.
ROMAD — ROM/EPROM Mapping Control
Refer to
2 Operating Modes and On-Chip Memory
.
PSELx
2
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
Interrupt Source Promoted
4
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
3
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
0
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
X
Reserved (Default to IRQ)
Reserved (Default to IRQ)
Reserved (Default to IRQ)
IRQ
Real-Time Interrupt
Timer Input Capture 1
Timer Input Capture 2
Timer Input Capture 3
Timer Output Compare 1
Timer Output Compare 2
Timer Output Compare 3
Timer Output Compare 4
Timer Input Capture 4/Output Compare 5
Timer Overflow
Pulse Accumulator Overflow
Pulse Accumulator Input Edge
SPI Serial Transfer Complete
SCI Serial System
Reserved (Default to IRQ)
Reserved (Default to IRQ)
Reserved (Default to IRQ)
Reserved (Default to IRQ)
CONFIG
— COP, ROM Mapping, EEPROM Enables
$003F
Bit 7
6
5
4
3
2
1
Bit 0
ROMAD
—
CLKX
PAREN
NOSEC
NOCOP
ROMON
EEON
RESET:
—
1
—
—
—
—
—
—
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