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參數資料
型號: MC74AC174
廠商: ON SEMICONDUCTOR
英文描述: HEX D FLIP-FLOP WITH MASTER RESET
中文描述: 六角D觸發器與主復位次浮點運算
文件頁數: 2/7頁
文件大小: 174K
代理商: MC74AC174
MC74AC174 MC74ACT174
5-2
FACT DATA
FUNCTIONAL DESCRIPTION
The MC74AC174/74ACT174 consists of six edge-triggered D
flip-flops with individual D inputs and Q outputs. The Clock
(CP) and Master Reset (MR) are common to all flip-flops. Each
D input’s state is transferred to the corresponding flip-flop’s
output following the LOW-to-HIGH Clock (CP) transition. A
LOW input to the Master Reset (MR) will force all outputs LOW
independent of Clock or Data inputs. The MC74AC174/
74ACT174 is useful for applications where the true output only
is required and the Clock and Master Reset are common to all
storage elements.
LOGIC DIAGRAM
CP
MR
Q5
D5
Q
CD
Please note that this diagram is provided only for the understanding of logic
operations and should not be used to estimate propagation delays.
CP
D
Q4
D4
Q
CD
CP
D
Q3
D3
Q
CD
CP
D
Q2
D2
Q
CD
CP
D
Q1
D1
Q
CD
CP
D
Q0
D0
Q
CD
CP
D
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
Vin
Vout
Iin
Iout
ICC
Tstg
DC Supply Voltage (Referenced to GND)
–0.5 to +7.0
V
DC Input Voltage (Referenced to GND)
–0.5 to VCC +0.5
–0.5 to VCC +0.5
±
20
V
DC Output Voltage (Referenced to GND)
V
DC Input Current, per Pin
mA
DC Output Sink/Source Current, per Pin
±
50
mA
DC VCC or GND Current per Output Pin
Storage Temperature
±
50
mA
–65 to +150
°
C
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended
Operating Conditions.
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