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參數(shù)資料
| 型號(hào)： | MC74AC194N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER |
| 中文描述： | AC SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 4/7頁 |
| 文件大小： | 213K |
| 代理商： | MC74AC194N |
MC74AC194 MC74ACT194
5-4
FACT DATA
AC CHARACTERISTICS
(For Figures and Waveforms — See Section 3)
Symbol
Parameter
(V)
74AC
74AC
Unit
No.
VCC*
TA = +25
°
C
CL = 50 pF
TA = –40
°
C
to +85
°
C
CL = 50 pF
Fig.
Min
Max
Min
Max
fmax
Maximum Input
Frequency
3.3
5.0
130
210
115
150
MHz
3-3
tPLH
Propagation Delay
CP to Q
3.3
5.0
2.0
2.0
14.5
12.5
1.5
1.5
16.0
14.0
ns
3-6
tPHL
Propagation Delay
CP to Q
3.3
5.0
2.0
2.0
14.5
12.5
1.5
1.5
16.0
14.0
ns
3-6
tPHL
Propagation Delay
Reset to Q
3.3
5.0
2.0
2.0
11.0
9.0
1.5
1.5
12.0
10.0
ns
3-6
* Voltage Range 3.3 V is 3.3 V
±
0.3 V.
Voltage Range 5.0 V is 5.0 V
±
0.5 V.
AC OPERATING REQUIREMENTS
Symbol
Parameter
(V)
74AC
74AC
Unit
No.
VCC*
TA = +25
°
C
CL = 50 pF
TA = –40
°
C
to +85
°
C
CL = 50 pF
Fig.
Guaranteed Minimum
ts
Setup Time,
Pn to Clock
Hold Time,
Pn to Clock
3.3
5.0
4.0
2.5
5.0
3.5
ns
3-9
th
3.3
5.0
3.5
2.0
4.0
2.5
ns
3-9
ts
Setup Time, Sn to CP
3.3
5.0
5.5
4.0
6.5
5.0
ns
3-9
th
Hold Time,
Sn to CP
Setup Time,
DSR or DSL to Clock
3.3
5.0
3.5
2.0
4.0
2.5
ns
3-9
ts
3.3
5.0
5.5
4.0
6.0
4.5
ns
3-9
th
Hold Time,
DSR or DSL to Clock
3.3
5.0
1.5
2.0
2.0
2.5
ns
3-9
tw
CP Pulse Width
3.3
5.0
5.5
4.0
6.0
4.5
ns
3-6
tw
MR Pulse Width
3.3
5.0
5.5
4.0
6.0
4.5
ns
3-9
trec
Recovery TIme
MR to CP
3.3
5.0
1.5
1.0
1.5
1.0
ns
3-9
* Voltage Range 3.3 V is 3.3 V
±
0.3 V.
Voltage Range 5.0 V is 5.0 V
±
0.5 V.
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