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參數資料
| 型號： | MC74AC273NG |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal D Flip−Flop |
| 中文描述： | AC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20 |
| 封裝： | LEAD FREE, PLASTIC, DIP-20 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 120K |
| 代理商： | MC74AC273NG |
Semiconductor Components Industries, LLC, 2005
December, 2005 Rev. 6
1
Publication Order Number:
MC74AC273/D
MC74AC273, MC74ACT273
Octal D FlipFlop
The MC74AC273/74ACT273 has eight edge-triggered Dtype
flipflops with individual D inputs and Q outputs. The common
buffered Clock (CP) and Master Reset (MR) inputs load and reset
(clear) all flipflops simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the LOWtoHIGH clock transition, is transferred
to the corresponding flipflop’s Q output.
All outputs will be forced LOW independently of Clock or Data
inputs by a LOW voltage level on the MR input. The device is useful
for applications where the true output only is required and the Clock
and Master Reset are common to all storage elements.
Features
Ideal Buffer for MOS Microprocessor or Memory
Eight Edge-Triggered D FlipFlops
Buffered Common Clock
Buffered, Asynchronous Master Reset
See MC74AC377 for Clock Enable Version
See MC74AC373 for Transparent Latch Version
See MC74AC374 for 3-State Version
Outputs Source/Sink 24 mA
′
ACT273 Has TTL Compatible Inputs
PbFree Packages are Available*
Pinout: 20Lead Packages Conductors
19
20
18
17
16
15
14
2
1
3
4
5
6
7
V
CC
13
8
12
9
11
10
Q
7
D
7
D
6
Q
6
Q
5
D
5
D
4
Q
4
CP
MR
Q
0
D
0
D
1
Q
(Top View)
Q
2
D
2
D
3
Q
3
GND
MODE SELECT-FUNCTION TABLE
Operating Mode
Inputs
Outputs
MR
CP
D
n
X
Q
n
L
Reset (Clear)
Load
′
1
′
Load
′
0
′
L
X
H
H
H
H
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Clock Transition
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
SOEIAJ20
SUFFIX M
CASE 967
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
1
TSSOP20
SUFFIX DT
CASE 948E
SOIC20WB
SUFFIX DW
CASE 751D
1
1
See general marking information in the device marking
section on page 6 of this data sheet.
DEVICE MARKING INFORMATION
20
20
20
PDIP20
SUFFIX N
CASE 738
1
20
PIN ASSIGNMENT
PIN
D
0
D
7
MR
FUNCTION
Data Inputs
Master Reset
CP
Clock Pulse Input
Q
0
Q
7
Data Outputs
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
CP
MR
Logic Symbol
相關PDF資料 |
PDF描述 |
|---|---|
| MC74ACT273DTR2G | Octal D Flip−Flop |
| MC74ACT273DWG | Octal D Flip−Flop |
| MC74ACT273DWR2G | Octal D Flip−Flop |
| MC74ACT273MELG | Octal D Flip−Flop |
| MC74ACT273MG | Octal D Flip−Flop |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC74AC299 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:8-Input Universal Shift/ Storage Register with Common Parallel I/O Pins |
| MC74AC299DW | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:8-Input Universal Shift/ Storage Register with Common Parallel I/O Pins |
| MC74AC299DWR2 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:8-Input Universal Shift/ Storage Register with Common Parallel I/O Pins |
| MC74AC299N | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:8-Input Universal Shift/ Storage Register with Common Parallel I/O Pins |
| MC74AC32 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:QUAD 2-INPUT OR GATE |
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