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參數資料
| 型號： | MC74AC74NG |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual D−Type Positive Edge−Triggered Flip−Flop |
| 中文描述： | AC SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14 |
| 封裝： | LEAD FREE, PLASTIC, DIP-14 |
| 文件頁數： | 1/12頁 |
| 文件大小： | 167K |
| 代理商： | MC74AC74NG |
Semiconductor Components Industries, LLC, 2006
October, 2006
Rev. 7
1
Publication Order Number:
MC74AC74/D
MC74AC74, MC74ACT74
Dual DType Positive
EdgeTriggered FlipFlop
The MC74AC74/74ACT74 is a dual D
type flip
flop with
Asynchronous Clear and Set inputs and complementary (Q,Q)
outputs. Information at the input is transferred to the outputs on the
positive edge of the clock pulse. Clock triggering occurs at a voltage
level of the clock pulse and is not directly related to the transition time
of the positive-going pulse. After the Clock Pulse input threshold
voltage has been passed, the Data input is locked out and information
present will not be transferred to the outputs until the next rising edge
of the Clock Pulse input.
Asynchronous Inputs:
LOW input to S
D
(Set) sets Q to HIGH level
LOW input to C
D
(Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on C
D
and S
D
makes both Q and Q HIGH
Features
Outputs Source/Sink 24 mA
′
ACT74 Has TTL Compatible Inputs
Pb
Free Packages are Available
CP
1
C
D
2
CP
2
D
2
13
14
12
11
10
9
8
2
1
3
4
5
6
7
V
CC
C
D1
D
1
CP
1
S
D1
Q
1
Q
1
C
D2
D
2
CP
2
S
D2
Q
2
Q
2
C
D
1
S
D
1
Q
1
Q
1
D
1
S
D
2
Q
2
Q
2
GND
Figure 1. Pinout: 14
Lead Packages Conductors
(Top View)
PIN ASSIGNMENT
PIN
FUNCTION
D
1
, D
2
Data Inputs
CP
1
, CP
2
Clock Pulse Inputs
C
D1
, C
D2
Direct Clear Inputs
S
D1
, S
D2
Direct Set Inputs
Q
1
, Q
1
, Q
2
,
Q
2
Outputs
TSSOP
14
DT SUFFIX
CASE 948G
1
14
SOEIAJ
14
M SUFFIX
CASE 965
1
14
SOIC
14
D SUFFIX
CASE 751A
1
14
1
14
PDIP
14
N SUFFIX
CASE 646
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
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