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參數資料
| 型號： | MC74F259N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Processor Supervisory Circuits 5-SOT-23 -40 to 85 |
| 中文描述： | F/FAST SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數： | 5/5頁 |
| 文件大小： | 118K |
| 代理商： | MC74F259N |
4-137
FAST AND LS TTL DATA
MC54/74F259
AC OPERATING REQUIREMENTS
Symbol
Parameter
54/74F
54F
74F
Unit
VCC = +5.0 V
VCC = 5.0
±
10%
VCC = 5.0 V
±
10%
TA = +25
°
C
TA = –55 to +125
°
C
TA = 0 to +70
°
C
Min
Max
Min
Max
Min
Max
ts(H)
ts(L)
Setup Time, HIGH or LOW
Dn to E
4.0
4.0
5.0
5.0
4.0
4.0
ns
th(H)
th(L)
Hold Time, HIGH or LOW
Dn to E
2.0
2.0
2.0
2.0
2.0
2.0
ns
ts(H)
ts(L)
Setup Time, HIGH or LOW
A to E(a)
4.0
4.0
4.0
4.0
4.0
4.0
ns
th(H)
th(L)
tW
tW
a. The Address to Enable setup time is the time before the HIGH-to-LOW Enable transition that the Address must be stable so that the correct latch is addressed
and the other latches are not affected.
b. The Address to Enable hold time is the time after the LOW-to-HIGH Enable transition that the Address must be stable so that the correct latch is addressed and
the other latches are not affected.
Hold Time, HIGH or LOW
A to E(b)
0
0
0
0
0
0
ns
E Pulse Width
MR
Pulse Width
4.0
4.0
4.0
ns
4.0
4.0
4.0
ns
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