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參數資料
| 型號： | MC74F803 |
| 廠商： | Motorola, Inc. |
| 英文描述： | CLOCK DRIVER QUAD D-TYPE FLIP-FLOP WITH MATCHED PROPAGATION DELAYS |
| 中文描述： | 時鐘驅動器，四D型倒裝與時滯匹配傳輸次浮點運算 |
| 文件頁數： | 3/5頁 |
| 文件大小： | 90K |
| 代理商： | MC74F803 |
MC74F803
3
MOTOROLA
TIMING SOLUTIONS
BR1333 — REV 4
AC OPERATING REQUIREMENTS
(TA = 0 to 70
°
C, VCC = 5.0 V
±
10%)
CL = 50 pF
CL = 100 pF
Symbol
Parameter
Min
Max
Min
Max
Unit
ts(H)
ts(L)
Setup Time, HIGH or LOW
Dn to CP
3.0
3.0
—
—
4.0
4.0
—
—
ns
tf
tp + ts (see Note)
—
9.0
—
12
ns
th(H)
th(L)
Hold Time, HIGH or LOW
Dn to CP
2.0
2.0
—
—
2.0
2.0
—
—
ns
tw(H)
tw(L)
The combination of the setup time (ts) requirement and maximum propagation delay (tp) are guaranteed to be within this limit for all conditions.
CP Pulse Width
HIGH or LOW
7.0
6.0
—
—
8.0
8.0
—
—
ns
APPLICATION NOTE
The closely matched outputs of the MC74F803 provide an ideal interface for the clock input of Motorola’s high-frequency
microprocessors.
74F803 INTERFACE AS CLOCK TO MC68020 SYSTEM
VCC
33CLK1
E1
C2
MC68020/MC68030
CLK
CLK
MC68881/MC68882
RU
RT
33CLK
33CLK2 (40 mA OUTPUT DRIVE)
3
6
9
12
7
8
66 MHz
CLK
4
5
10
11
1
14
74F04
1
MC74F803
D0
D1
D2
D3
O0
O1
O2
O3
CP
2
VCC
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