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參數(shù)資料
| 型號： | MC74HC10ADTR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 0K |
| 描述： | IC GATE NAND TRIPLE 3INP 14TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 系列： | 74HC |
| 邏輯類型： | 與非門 |
| 電路數(shù)： | 3 |
| 輸入數(shù)： | 3 |
| 電源電壓： | 2 V ~ 6 V |
| 電流 - 靜態(tài)（最大值）： | 1µA |
| 輸出電流高，低： | 5.2mA，5.2mA |
| 邏輯電平 - 低： | 0.5 V ~ 1.8 V |
| 邏輯電平 - 高： | 1.5 V ~ 4.2 V |
| 額定電壓和最大 CL 時的最大傳播延遲： | 16ns @ 6V，50pF |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 包裝： | 帶卷 (TR) |
Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 2
1
Publication Order Number:
MC74HC10A/D
MC74HC10A
Triple 3-Input NAND Gate
HighPerformance SiliconGate CMOS
The MC74HC10A is identical in pinout to the LS10. The device
inputs are compatible with Standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance With the Requirements Defined JEDEC
Standard No. 7 A
Chip Complexity: 36 FETs or 9 Equivalent Gates
These are PbFree Devices
LOGIC DIAGRAM
PIN 14 = VCC
PIN 7 = GND
Y = ABC
A1
B1
C1
A2
B2
C2
A3
B3
C3
Y1
1
2
13
Y2
Y3
3
4
5
9
10
11
12
6
8
PIN ASSIGNMENT
11
12
13
14
8
9
10
5
4
3
2
1
7
6
B3
C3
Y1
C1
VCC
Y3
A3
B2
A2
B1
A1
GND
Y2
C2
MARKING
DIAGRAMS
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G = PbFree Package
L
H
L
H
L
H
FUNCTION TABLE
Inputs
Output
AB
H
L
Y
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
TSSOP14
DT SUFFIX
CASE 948G
14
1
SOIC14
D SUFFIX
CASE 751A
14
1
HC10AG
AWLYWW
1
14
HC
10A
ALYWG
G
1
14
(Note: Microdot may be in either location)
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