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參數資料
| 型號： | MC74HC165D |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Bit Serial or Parallel-Input/Serial-Output Shift Register |
| 中文描述： | HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SOIC-16 |
| 文件頁數： | 6/9頁 |
| 文件大小： | 280K |
| 代理商： | MC74HC165D |
MC54/74HC165A
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
6
SWITCHING WAVEFORMS
tr
tf
VCC
GND
90%
50%
10%
tPLH
tPHL
CLOCK
OR CLOCK INHIBIT
90%
50%
10%
tTLH
tTHL
QH OR QH
Figure 1. Serial–Shift Mode
SERIAL SHIFT/
PARALLEL LOAD
QH OR QH
50%
tPLH
50%
VCC
GND
tPHL
50%
Figure 2. Parallel–Load Mode
tr
tf
INPUT H
90%
50%
10%
90%
50%
10%
VCC
GND
tPHL
tTHL
tTLH
tPLH
QH OR QH
Figure 3. Parallel–Load Mode
50%
VCC
GND
th
VCC
GND
ASYNCHRONOUS PARALLEL
LOAD
(LEVEL SENSITIVE)
SERIAL SHIFT/
PARALLEL LOAD
INPUTS A–H
Figure 4. Parallel–Load Mode
INPUT SA
50%
50%
CLOCK
OR CLOCK INHIBIT
VCC
GND
VCC
GND
Figure 5. Serial–Shift Mode
SERIAL SHIFT/
PARALLEL LOAD
CLOCK
OR CLOCK INHIBIT
50%
50%
tsu
VCC
GND
VCC
GND
CLOCK 2 INHIBITED
CLOCK INHIBIT
CLOCK
50%
50%
tsu
trec
VCC
GND
VCC
GND
Figure 6. Serial–Shift Mode
Figure 7. Serial–Shift, Clock–Inhibit Mode
Figure 8. Test Circuit
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
tw
1/fmax
tw
VALID
tsu
VALID
tsu
th
th
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