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參數(shù)資料
型號(hào): MC74HC244ADWR2
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: NPN Epitaxial Silicon Transistor
中文描述: HC/UH SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: SOIC-20
文件頁(yè)數(shù): 2/7頁(yè)
文件大小: 258K
代理商: MC74HC244ADWR2
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
450
Tstg
TL
SSOP or TSSOP Package
Storage Temperature
– 65 to + 150
C
Lead Temperature, 1 mm from Case for 10 Seconds
C
* Maximum Ratings are those values beyond which damage to the device may occur.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
SSOP or TSSOP Package: – 6.1 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Symbol
Parameter
Min
Max
Unit
DC Input Voltage, Output Voltage (Referenced to GND)
0
+ 125
V
Operating Temperature, All Package Types
– 55
C
(Figure 1)
0
500
(Voltages Referenced to GND)
VCC = 4.5 V
Guaranteed Limit
Voltage
20
μ
A
4.5
3.15
3.15
3.15
VIL
Maximum Low–Level Input
Vout = 0.1 V
2.0
6.0
0.5
1.8
0.5
1.8
0.5
1.8
Minimum High–Level Output
2.0
1.9
1.9
1.9
V
7.8 mA
5.48
5.34
5.20
V
Maximum Low–Level Output
|Iout|
6.0
2.0
0.1
0.1
0.1
7.8 mA
0.26
0.33
0.40
V
Maximum Input Leakage Current
|Iout|
6.0
6.0
±
0.1
±
1.0
±
1.0
μ
A
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
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