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參數資料
| 型號： | MC74HC253N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual 4-Input Data Selector/Multiplexer with 3-State Outputs |
| 中文描述： | HC/UH SERIES, DUAL 4 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數： | 3/5頁 |
| 文件大?。?/td> | 186K |
| 代理商： | MC74HC253N |
MC74HC253
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
tPHL
(Figures 1 and 3)
4.5
28
42
6.0
30
35
45
tPLZ,
Maximum Propagation Delay, Output Enable to Y
2.0
150
190
37
225
ns
tPZH
(Figures 2 and 4)
4.5
20
30
6.0
13
25
19
Cin
Cout
Maximum Input Capacitance
—
10
16
10
pF
Maximum Three–State Output Capacitance
—
15
10
15
pF
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
15
CPD
Power Dissipation Capacitance (Per Multiplexer)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
31
pF
SWITCHING WAVEFORMS
Figure 1.
Figure 2.
tr
tf
VCC
GND
A OR D
Y
tPHL
tPLH
tTLH
tTHL
10%
590%
10%
50%
OUTPUT
ENABLE
Y
Y
50%
50%
50%
90%
10%
tPZL
tPLZ
tPZH
tPHZ
VCC
GND
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
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