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參數(shù)資料
| 型號： | MC74HC4049D |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Hex Buffers/Logic-Level Down Converters |
| 中文描述： | HC/UH SERIES, HEX 1-INPUT INVERT GATE, PDSO16 |
| 封裝： | PLASTIC, SOIC-16 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大小： | 191K |
| 代理商： | MC74HC4049D |
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
2
ICC
PD
20
±
25
±
50
DC Input Current, per Pin
mA
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air,Plastic or Ceramic DIP
mA
mA
750
mW
(Plastic DIP or SOIC Package)
Functional operation should be restricted to the Recommended Operating Conditions.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
Ceramic DIP: – 10 mW/ C from 100 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
260
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
DC Output Voltage (Referenced to GND)
0
+ 125
V
Operating Temperature, All Package Types
– 55
C
Input Rise and Fall Time
0
1000
ns
Symbol
Parameter
Test Conditions
V
25 C
85 C
4.2
4.2
VCC
125 C
4.2
6.0
Unit
VIL
Maximum Low–Level Input
Vout = 0.1 V or VCC – 0.1 V
2.0
6.0
0.3
1.2
0.3
1.2
0.3
1.2
VOH
Minimum High–Level Output
Vin = VIH
2.0
1.9
1.9
1.9
V
4.0 mA
5.2 mA
3.98
5.48
3.84
5.34
3.70
5.20
V
|Iout|
4.5
6.0
6.0
0.1
0.1
0.1
Vin = VIH or VIL
4.0 mA
0.26
0.5
0.33
5.0
0.40
5.0
Vin = 15 V
Vin = 15 V or GND
|Iout|
4.5
6.0
ICC
Maximum Quiescent Supply
6.0
2
40
μ
A
20
This device contains circuitry to
protect the inputs against damage
due to high static voltages or electric
fields referenced to the GND pin,
only. Extra precautions must be
taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance
circuit. For proper operation, the
ranges GND
Vin
GND
Vout
VCC are recom-
mended.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
15 V and
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