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參數(shù)資料
型號: MC74HC540AN
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Octal 3-State Inverting Buffer/Line Driver/Line Receiver
中文描述: HC/UH SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 2/5頁
文件大小: 149K
代理商: MC74HC540AN
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
3–2
Plastic DIP or SOIC Package
* Maximum Ratings are those values beyond which damage to the device may occur.
Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C
SOIC Package: – 7 mW/ C from 65 to 125 C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
260
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
DC Supply Voltage (Referenced to GND)
Min
2.0
Max
6.0
Unit
V
DC Input Voltage, Output Voltage (Referenced to GND)
0
+ 125
V
Operating Temperature Range, All Package Types
– 55
C
Input Rise/Fall Time
0
1000
ns
DC CHARACTERISTICS
(Voltages Referenced to GND)
V
Guaranteed Limit
Symbol
Parameter
Condition
VCC
–55 to 25
°
C
85
°
C
125
°
C
Unit
VIH
Minimum High–Level Input Voltage
Vout = 0.1V
|Iout|
20
μ
A
2.0
3.0
4.5
6.0
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
V
VIL
Maximum Low–Level Input Voltage
Vout = VCC – 0.1V
|Iout|
20
μ
A
2.0
3.0
4.5
6.0
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
V
VOH
Minimum High–Level Output
Voltage
Vin = VIL
|Iout|
20
μ
A
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
Vin = VIL
|Iout|
3.6mA
|Iout|
6.0mA
|Iout|
7.8mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
VOL
Maximum Low–Level Output
Voltage
Vin = VIH
|Iout|
20
μ
A
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
Vin = VIH
|Iout|
3.6mA
|Iout|
6.0mA
|Iout|
7.8mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.40
0.40
0.40
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
±
0.1
±
1.0
±
1.0
μ
A
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND (Vin or Vout)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
VCC.
相關(guān)PDF資料
PDF描述
MC74HC540ADW Octal 3-State Inverting Buffer/Line Driver/Line Receiver
MC74HC540AN Octal 3-State Inverting Buffer/Line Driver/Line Receiver
MC74HC541ADW Octal 3-State Non-Inverting Buffer/Line Driver/Line Receiver
MC74HC541 Octal 3-State Non-Inverting Buffer/Line Driver/Line Receiver
MC74HC541AN 0.5A Bridge Rectifier
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