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參數(shù)資料
| 型號(hào)： | MC74HC688N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Bit Equality Comparator |
| 中文描述： | HC/UH SERIES, 8-BIT IDENTITY COMPARATOR, INVERTED OUTPUT, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 202K |
| 代理商： | MC74HC688N |
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
High–Performance Silicon–Gate CMOS
The MC54/74HC688 is identical in pinout to the LS688. The device inputs
are compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
The HC688 compares two 8–bit binary or BCD words and indicates
whether or not they are equal. By using the Cascade Input, two or more of
the devices may be cascaded to compare words of more than 8 bits.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1
μ
A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 116 FETs or 29 Equivalent Gates
LOGIC DIAGRAM
2
4
6
8
11
13
15
17
3
5
7
9
1
A0
A1
A2
A3
A4
A5
A6
A7
CASCADE
INPUT
PIN 20 = VCC
PIN 10 = GND
19
A = B
OUTPUT
DATA
WORD
A
INPUTS
DATA
WORD
B
INPUTS
12
14
16
18
B0
B1
B2
B3
B4
B5
B6
B7
PIN ASSIGNMENT
FUNCTION TABLE
A2
A1
B0
A0
CASCADE
INPUT
GND
B3
A3
B2
B1
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
B6
A7
A = B
VCC
B4
A5
B5
A6
Inputs
Output
Data
Words
Cascade
A = B
A = B
A > B
A < B
X
L
L
L
H
L
H
H
H
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
1
20
1
20
1
20
ORDERING INFORMATION
MC54HCXXXJ
MC74HCXXXN
MC74HCXXXDW
Ceramic
Plastic
SOIC
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| MC74HC74A | Dual D Flip-Flop with Set and Reset |
| MC74HC74AD | Dual D Flip-Flop with Set and Reset |
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| MC74HC7266N | 制造商:Motorola Inc 功能描述: |
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