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參數資料
| 型號： | MC74VHC1GT05DTT3 |
| 廠商： | 樂山無線電股份有限公司 |
| 英文描述： | Noninverting Buffer/CMOS Logic Level Shifter |
| 中文描述： | 同相緩沖/ CMOS邏輯電平轉換器 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 202K |
| 代理商： | MC74VHC1GT05DTT3 |
LESHAN RADIO COMPANY, LTD.
VHT50–1/4
The MC74VHC1GT50 is a single gate noninverting buffer fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The device input is compatible with TTL–type input thresholds and the output has a full 5 V CMOS level output swing. The input
protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from
3.0 V CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high–voltage power
supply.
The MC74VHC1GT50 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT50 to be used to interface 5 V circuits to 3 V circuits. The output structures also provide protection when
V
CC
= 0 V. These input and output structures help prevent device destruction caused by supply voltage – input/output voltage mismatch,
battery backup, hot insertion, etc.
High Speed: t
PD
= 3.5 ns (Typ) at V
CC
= 5 V
Low Power Dissipation: I
CC
= 2 mA (Max) at T
A
= 25°C
TTL–Compatible Inputs: V
IL
= 0.8 V; V
IH
= 2.0 V
CMOS–Compatible Outputs: V
OH
> 0.8 V
CC
;
V
OL
< 0.1 V
CC
@Load
Noninverting Buffer / CMOS Logic Level Shifter
with LSTTL–Compatible Inputs
VL
d
VL
d
1
3
2
4
5
SOT–23/TSOP–5/SC–59
DT SUFFIX
CASE 483
SC–70/SC–88A/SOT–353
DF SUFFIX
CASE 419A
1
3
2
4
5
MARKING DIAGRAMS
Pin 1
d = Date Code
Pin 1
d = Date Code
Figure 1. Pinout
(Top View)
Figure 2. Logic Symbol
PIN ASSIGNMENT
1
2
3
4
5
NC
IN A
GND
OUT Y
V
CC
FUNCTION TABLE
Inputs
A
L
H
Output
Y
L
H
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 4 of this data sheet.
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 104; Equivalent Gates = 26
MC74VHC1GT50
相關PDF資料 |
PDF描述 |
|---|---|
| MC74VHC1GT05DFT1 | Noninverting Buffer/CMOS Logic Level Shifter |
| MC74VHC1GT05DFT2 | Noninverting Buffer/CMOS Logic Level Shifter |
| MC74VHC1GT05DFT4 | Noninverting Buffer/CMOS Logic Level Shifter |
| MC74VHCG03DFT1 | 2-Input NAND Gate with Open Drain Output |
| MC74VHCG03DFT2 | 2-Input NAND Gate with Open Drain Output |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC74VHC1GT08DF1G | 功能描述:邏輯門 3-5.5V Single AND 2-Input TTL RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC74VHC1GT08DF2G | 功能描述:邏輯門 3-5.5V Single AND 2-Input TTL RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC74VHC1GT08DFT1 | 功能描述:邏輯門 3-5.5V Single AND RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC74VHC1GT08DFT2 | 功能描述:邏輯門 3-5.5V Single AND RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| MC74VHC1GT08DT1G | 功能描述:邏輯門 3-5.5V Single AND 2-Input TTL RoHS:否 制造商:Texas Instruments 產品:OR 邏輯系列:LVC 柵極數量:2 線路數量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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