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參數資料
型號: MC74VHCT259AMG
廠商: ON Semiconductor
文件頁數: 1/10頁
文件大小: 0K
描述: IC LATCH/DECODER/SHIFTR 16SOEIAJ
產品變化通告: Product Discontinuation 30/Sept/2011
標準包裝: 50
系列: 74VHCT
邏輯類型: D 型,可尋址
電路: 1:8
輸出類型: 標準
電源電壓: 4.5 V ~ 5.5 V
獨立電路: 1
延遲時間 - 傳輸: 6ns
輸出電流高,低: 8mA,8mA
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.209",5.30mm 寬)
供應商設備封裝: 16-SOEIAJ
包裝: 管件
Semiconductor Components Industries, LLC, 2011
May, 2011 Rev. 5
1
Publication Order Number:
MC74VHCT259A/D
MC74VHCT259A
8-Bit Addressable
Latch/1-of-8 Decoder
CMOS Logic Level Shifter
with LSTTLCompatible Inputs
The MC74VHCT259 is an 8bit Addressable Latch fabricated with
silicon gate CMOS technology. It achieves high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining CMOS
low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The VHC259 is designed for general purpose storage applications in
digital systems. The device has four modes of operation as shown in
the mode selection table. In the addressable latch mode, the signal on
Data In is written into the addressed latch. The addressed latch follows
the data input with all nonaddressed latches remaining in their
previous states. In the memory mode, all latches remain in their
previous state and are unaffected by the Data or Address inputs. In the
oneofeightdecoding or demultiplexing mode, the addressed output
follows the state of Data In with all other outputs in the LOW state. In
the Reset mode, all outputs are LOW and unaffected by the address
and data inputs. When operating the VHCT259 as an addressable
latch, changing more than one bit of the address could impose a
transient wrong address. Therefore, this should only be done while in
the memory mode.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V because it
has full 5.0 V CMOS level output swings.
The VHCT259A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when VCC = 0 V. These
input and output structures help prevent device destruction caused by
supply voltageinput/output voltage mismatch, battery backup, hot
insertion, etc.
Features
High Speed: tPD = 7.6 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
TTLCompatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs and Outputs
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V
These Devices are PbFree and are RoHS Compliant
MARKING
DIAGRAMS
TSSOP16
DT SUFFIX
CASE 948F
SOIC16
D SUFFIX
CASE 751B
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
A
= Assembly Location
WL, L
= Wafer Lot
Y
= Year
WW, W = Work Week
G or G
= PbFree Package
VHCT259AG
AWLYWW
VHCT
259A
ALYWG
G
(Note: Microdot may be in either location)
1
16
1
16
1
SOEIAJ16
M SUFFIX
CASE 966
74VHCT259
ALYWG
1
16
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