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參數資料
| 型號： | MCM56824A |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8K x 24 Bit Fast Static RAM |
| 中文描述： | 8K的× 24位高速靜態RAM |
| 文件頁數： | 1/10頁 |
| 文件大?。?/td> | 147K |
| 代理商： | MCM56824A |
MCM56824A
1
Motorola, Inc. 1995
DSPRAM
8K x 24 Bit Fast Static RAM
The MCM56824A is a 196,608 bit static random access memory organized as
8,192 words of 24 bits. The device integrates an 8K x 24 SRAM core with multiple
chip enable inputs, output enable, and an externally controlled single address pin
multiplexer. These functions allow for direct connection to the Motorola
DSP56001 Digital Signal Processor and provide a very efficient means for imple-
mentation of a reduced parts count system requiring no additional interface logic.
The availability of multiple chip enable (E1 and E2) and output enable (G) in-
puts provides for greater system flexibility when multiple devices are used. With
either chip enable input unasserted, the device will enter standby mode, useful
in low–power applications. A single on–chip multiplexer selects A12 or X/Y as the
highest order address input depending upon the state of the V/S control input.
This feature allows one physical static RAM component to efficiently store pro-
gram and vector or scalar operands by dynamically re–partitioning the RAM
array. Typical applications will logically map vector operands into upper memory
with scalar operands being stored in lower memory. By connecting
DSP56001address A15 to the VECTOR/SCALAR (V/S) MUX control
pin, such partitioning can occur with no additional components. This al-
lows efficient utilization of the RAM resource irrespective of operand
type. See application diagrams at the end of this document for addition-
al information.
Multiple power and ground pins have been utilized to minimize effects
induced by output noise.
The MCM56824A is available in a 52 pin plastic leaded chip–carrier
(PLCC) and a 9 x 10 grid, 86 bump surface mount PBGA.
Single 5 V
±
10% Power Supply
Fast Access and Cycle Times: 20/25/35 ns Max
Fully Static Read and Write Operations
Equal Address and Chip Enable Access Times
Single Bit On–Chip Address Multiplexer
Active High and Active Low Chip Enable Inputs
Output Enable Controlled Three State Outputs
High Board Density PLCC Package
Low Power Standby Mode
Fully TTL Compatible
DSPRAM is a trademark of Motorola, Inc.
REV 2
4/95
For proper operation of the device, all VSS
pins must be connected to ground.
PIN NAMES
A0 – A11
A12, X/Y
V/S
. . . . . . . . .
W
. . . . . . . . . . . . . . . . . . . . . . .
E1, E2
. . . . . . . . . . . . . . . . . . .
G
. . . . . . . . . . . . . . . . . . . . . .
DQ0 – DQ23
. . . . . . . . . .
VCC
. . . . . . . . . . . . . . .
VSS
. . . . . . . . . . . . . . . . . . . . . . . . . .
NC
. . . . . . . . . . . . . . . . . . . .
Address Inputs
Multiplexed Address
Address Multiplexer Control
. . . . . . . . . . . . . . .
. . . . . . . . . .
Write Enable
Chip Enable
Output Enable
Data Input/Output
+5 V Power Supply
Ground
No Connection
PIN ASSIGNMENTS
PLCC
DQ0
DQ1
DQ2
VSS
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
VSS
DQ9
DQ10
DQ23
DQ22
DQ21
VSS
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
VSS
DQ14
DQ13
D
A
A
A
A
D
N
W
G
C
V
S
V
E
E
8
9
10
11
12
13
14
15
16
17
18
19
20
46
45
44
43
42
41
40
39
38
37
36
35
34
47
48
49
50
51
52
1
2
3
4
5
6
7
33
32
31
30
29
28
27
26
25
24
23
22
21
A
A
A
A
A
A
A
A
A
C
V
N
X
V
D21
VSS
VSS
A0
VCC
NC
X/Y
A11
A2
A4
A3
D23
A1
V/S
A12
A10
D0
D22
D20
D17
D16
D15
D14
D13
D12
D1
D2
VSS
D5
D8
D7
VSS
D9
D11
D10
E2
A6
A8
W
E1
VCC
G
A7
A9
VSS
A5
D18
D19
VSS
D3
D4
D6
9
8
7
6
5
4
10
B
C
G
A
D
E
F
H
J
Not to Scale
3
2
1
VIEW OF PBGA PACKAGE BOTTOM
Order this document
by MCM56824A/D
SEMICONDUCTOR TECHNICAL DATA
MCM56824A
FN PACKAGE
52–LEAD PLCC
CASE 778–02
9 x 10 GRID
86 BUMP PBGA
CASE 896A–01
相關PDF資料 |
PDF描述 |
|---|---|
| MCM56824AFN25AZP25 | Circular Connector; No. of Contacts:66; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:19; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:19-35 RoHS Compliant: No |
| MCM56824AFN35 | 8K x 24 Bit Fast Static RAM |
| MCM60L256A-C | 32K x 8 Bit CMOS Static Random Access Memory |
| MCM60L256AFC10 | Circular Connector; No. of Contacts:37; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:15-35 RoHS Compliant: No |
| MCM60L256AFC10R2 | 32K x 8 Bit CMOS Static Random Access Memory |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MCM56824AFN20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 24 Bit Fast Static RAM |
| MCM56824AFN25AZP25 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 24 Bit Fast Static RAM |
| MCM56824AFN35 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 24 Bit Fast Static RAM |
| MCM56824AZP20 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 24 Bit Fast Static RAM |
| MCM56824AZP20R2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8K x 24 Bit Fast Static RAM |
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