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參數資料
| 型號： | MCM6227BJ35 |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | 1M x 1 Bit Static Random Access Memory |
| 中文描述： | 1M X 1 STANDARD SRAM, 35 ns, PDSO28 |
| 封裝： | 0.300 INCH, SOJ-28 |
| 文件頁數： | 6/8頁 |
| 文件大小： | 147K |
| 代理商： | MCM6227BJ35 |
MCM6227B
6
MOTOROLA FAST SRAM
WRITE CYCLE 2
(E Controlled, See Notes 1 and 2)
6227B–15
6227B–17
6227B–20
6227B–25
6227B–35
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Unit
Notes
Write Cycle Time
tAVAV
tAVEL
tAVEH
15
—
17
—
20
—
25
—
35
—
ns
3
Address Setup Time
0
—
0
—
0
—
0
—
0
—
ns
Address Valid to End of
Write
12
—
14
—
15
—
17
—
20
—
ns
Enable to End of Write
tELEH,
tELWH
10
—
11
—
12
—
15
—
20
—
ns
4, 5
Write Pulse Width
tWLEH
tDVEH
12
—
14
—
15
—
17
—
20
—
ns
Data Valid to End of
Write
7
—
8
—
8
—
10
—
11
—
ns
Data Hold Time
tEHDX
tEHAX
0
—
0
—
0
—
0
—
0
—
ns
Write Recovery Time
0
—
0
—
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus con-
tention conditions during read and write cycles.
3. All timings are referenced from the last valid address to the first transitioning address.
4. If E goes low coincident with or after W goes low, the output will remain in a high–impedance state.
5. If E goes high coincident with or before W goes high, the output will remain in a high–impedance state.
WRITE CYCLE 2
(E Controlled See Notes 1 and 2)
tEHDX
tDVEH
tEHAX
tELWH
tAVEL
tAVEH
DATA VALID
tAVAV
HIGH–Z
A (ADDRESS)
W (WRITE ENABLE)
E (CHIP ENABLE)
Q (DATA OUT)
D (DATA IN)
tELEH
tWLEH
ORDERING INFORMATION
(Order by Full Part Number)
Motorola Memory Prefix
Part Number
Package (J = 300 mil SOJ, WJ = 400 mil SOJ)
Full Part Numbers — MCM6227BJ15
MCM6227BJ15R2
MCM6227BJ17R2
MCM6227BJ20R2
MCM6227BJ25R2
MCM6227BJ35R2
MCM6227BWJ15
MCM6227BWJ17
MCM6227BWJ20
MCM6227BWJ25
MCM6227BWJ35
MCM6227BWJ15R2
MCM6227BWJ17R2
MCM6227BWJ20R2
MCM6227BWJ25R2
MCM6227BWJ35R2
MCM6227BJ17
MCM6227BJ20
MCM6227BJ25
MCM6227BJ35
Shipping Method (R2 = Tape and Reel, Blank = Rails)
MCM
6227B
XX
XX
XX
Speed (15 = 15 ns, 17 = 17 ns, 20 = 20 ns,
25 = 25 ns, 35 = 35 ns)
相關PDF資料 |
PDF描述 |
|---|---|
| MCM6227BJ35R2 | 1M x 1 Bit Static Random Access Memory |
| MCM6227BWJ35R2 | 1M x 1 Bit Static Random Access Memory |
| MCM6227BWJ35 | 1M x 1 Bit Static Random Access Memory |
| MCM6227BWJ25R2 | 1M x 1 Bit Static Random Access Memory |
| MCM6227BWJ15 | 1M x 1 Bit Static Random Access Memory |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MCM6227BJ35R2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x 1 Bit Static Random Access Memory |
| MCM6227BWJ15 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x 1 Bit Static Random Access Memory |
| MCM6227BWJ15R2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x 1 Bit Static Random Access Memory |
| MCM6227BWJ17 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x 1 Bit Static Random Access Memory |
| MCM6227BWJ17R2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x 1 Bit Static Random Access Memory |
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