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參數資料
型號: MCM63P531TQ8
廠商: MOTOROLA INC
元件分類: DRAM
英文描述: 32K x 32 Bit Pipelined BurstRAM Synchronous Fast Static RAM
中文描述: 32K X 32 CACHE SRAM, 8 ns, PQFP100
封裝: TQFP-100
文件頁數: 5/27頁
文件大小: 328K
代理商: MCM63P531TQ8
MCM63P636
5
MOTOROLA FAST SRAM
TQFP PIN DESCRIPTIONS
Pin Locations
Symbol
Type
Description
85
ADS
Input
Synchronous Address Status: Active low, used to initiate read or write
state machines latch in external addresses, or deselect chip.
(a) 1, 2, 3, 6, 7, 8, 9, 12, 13, 18,
19, 22, 23, 24, 25, 28, 29, 30
(b) 51, 52, 53, 56, 57, 58, 59, 62, 63,
68, 69, 72, 73, 74, 75, 78, 79, 80
DQx
I/O
Synchronous Data I/O: “x” refers to the word being read or written
(I/Os a and b).
89
K
Input
Clock: This signal registers the address, data in, and all control signals.
84
RESET
Input
Asynchronous Power–On Reset: Active low at power up, resets internal
state machines.
32, 33, 34, 35, 44, 45, 46,
47, 48, 49, 81, 82, 99, 100
SA
Input
Synchronous Address Inputs: These inputs are registered and must
meet setup and hold times.
36, 37
SA1, SA0
Input
Synchronous Address Inputs: These pins must be wired to the two
LSBs of the address bus for proper burst operation. These inputs are
registered and must meet setup and hold times.
98
SE1
Input
Synchronous Chip Enable: Active low to enable chip.
97
SE2
Input
Synchronous Chip Enable: Active high to enable chip.
92
SE3
Input
Synchronous Chip Enable: Active low to enable chip.
93
SK
Input
Data Strobe Clock: 180 degrees out–of–phase with K. Used only with
data strobes.
16
STRBA
Output
Data Strobe: Used in reference to DQa I/Os.
14
STRBA
Output
Data Strobe: Used in reference to DQa I/Os.
64
STRBB
Output
Data Strobe: Used in reference to DQb I/Os.
66
STRBB
Output
Data Strobe: Used in reference to DQb I/Os.
88
W
Input
Synchronous Write.
15, 41, 65, 91
VDD
VDDI
VDDQ
VSS
Supply
Core Power Supply.
38, 43, 87, 94
Supply
Input Power Supply.
4, 11, 20, 27, 54, 61, 70, 77
Supply
I/O Power Supply.
5, 10, 17, 21, 26, 40,
55, 60, 67, 71, 76, 90
Supply
Ground.
31, 39, 42, 50, 86
NC
No Connection: There is no connection to the chip.
83
NU/VDD
Not Usable: There is an internal connection to the chip. This pin may be
left unconnected or tied to VDD.
95, 96
NU/VSS
Not Usable: There is an internal connection to the chip. This pin may be
left unconnected or tied to VSS.
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