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參數資料
| 型號： | MCM63P631TQ117R |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | 64K x 32 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
| 中文描述： | 64K X 32 CACHE SRAM, 4.5 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數： | 10/27頁 |
| 文件大小： | 328K |
| 代理商： | MCM63P631TQ117R |
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MCM63P636
10
MOTOROLA FAST SRAM
CAPACITANCE AND INDUCTANCE
(See Notes 1, 2, and 3)
Pi D
Pin Description
TQFP
PBGA
Capacitance (pF)
Inductance (nH)
Capacitance (pF)
Inductance (nH)
Min
Max
Min
Max
Min
Max
Min
Max
I/O Pins
5
7
2
10
5.5
7.5
2.5
4.5
Data Strobe Pins
5
7
2
10
5.5
7.5
2.5
4.5
Input Pins
3
5
2
10
3.5
5.5
2.5
4
ADS Pin
5
7
2
10
5.5
7.5
2.5
4.5
K and SK Pins
3.5
4.5
2
10
4
5
1.5
3
TCK Boundary Scan Pin
—
—
—
—
—
5
—
—
Boundary Scan Input Pins
—
—
—
—
—
8
—
—
TDO Boundary Scan Pin
—
—
—
—
—
8
—
—
NOTES:
1. Parameters are periodically sampled rather than 100% tested.
2. Capacitance variation part to part on the same pin is
±
0.25 pF.
3. Inductance variation part to part on the same pin is
±
1 nH.
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VDD = 3.3 V
±
200 mV, Unless Otherwise Noted)
AC TEST CONDITIONS
Parameter
Value
Unit
Input Timing Reference Level
VDDQ/2
0 to 2.0
V
Input Pulse Levels
V
Input Rise/Fall Time (20 to 80%)
1
V/ns
Output Timing Reference Level
VDDQ/2
115
115
115
V
Die Temperature
TJ–250
TJ–225
TJ–200
°
C
OUTPUT
RL
Figure 4. AC Output Test Load
Z0 = 50
1.0 V
Figure 5. Lumped Capacitive Load and Typical Derating Curve
(TBD)
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