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參數(shù)資料
| 型號(hào)： | MCM64PC32TSG66 |
| 廠商： | MOTOROLA INC |
| 元件分類： | SRAM |
| 英文描述： | 256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium |
| 中文描述： | 32K X 64 CACHE TAG SRAM MODULE, 8 ns, DMA160 |
| 封裝： | CARD EDGE MODULE-160 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大小： | 167K |
| 代理商： | MCM64PC32TSG66 |
MCM64PC32T
MCM64PC64T
1
Motorola, Inc. 1997
Advance Information
256K/512K Pipelined BurstRAM
Secondary Cache Module
for Pentium
The MCM64PC32T (256K) and MCM64PC64T (512K) are designed to pro-
vide a burstable, high performance, L2 cache for the Pentium microprocessor in
conjunction with Intel’s Triton II chip set. The MCM64PC32T is configured as 32K
x 64 bits and the MCM64PC64T is configured as 64K x 64 bits. Both are pack-
aged in a 160 pin card edge memory module. Each module uses Motorola’s 3.3
V 32K x 32 BurstRAMs and one Motorola 3.3 V 32K x 8 FSRAM for the tag RAM.
Bursts can be initiated with either address status processor (ADSP) or cache
address status (CADS). Subsequent burst addresses are generated internal to
the BurstRAM by the cache burst advance (CADV) input pin.
Write cycles are internally self timed and are initiated by the rising edge of the
clock (CLK0) input. Eight write enables are provided for byte write control.
PD0 – PD3 map into the Triton II chip set for auto–configuration of the cache
control.
Pentium–Style Burst Counter on Chip
Pipelined Data Out
160 Pin Card Edge Module
Address Pipeline Supported by ADSP Disabled with Ex
All Cache Data and Tag I/Os are TTL Compatible
Three State Outputs
Byte Write Capability
Fast Module Clock Rate: 66 MHz
Fast SRAM Access Times:15 ns for Tag RAM
8 ns for Data RAMs
1.5 Cycle Deselect Data RAMs
Decoupling Capacitors for Each Fast Static RAM
High Quality Multi–Layer FR4 PWB with Separate Power and Ground
Planes
Single 3.3 V +10%, – 5% Power Supply
Burndy Connector, Part Number: CELP2X80SC3Z48
Intel COAST 3.0 Option III Compliant
Burst Order Select (BOSEL) Option
BurstRAM is a trademark of Motorola.
Pentium is a trademark of Intel Corp.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MCM64PC32T/D
MCM64PC32T
MCM64PC64T
160–LEAD CARD EDGE
CASE TBD, TOP VIEW
80
43
42
1
1/22/97
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCM64PC64TSG66 | 256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium |
| MCM64PC32T | 256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium |
| MCM6706RJ8 | 32K x 8 Bit Static Random Access Memory |
| MCM6706J6 | Circular Connector; Body Material:Aluminum; Series:PT06; Number of Contacts:41; Connector Shell Size:20; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Circular Contact Gender:Socket; Insert Arrangement:20-41 |
| MCM6706J7 | Circular Connector; Body Material:Aluminum; Series:PT06; No. of Contacts:41; Connector Shell Size:20; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Circular Contact Gender:Socket; Insert Arrangement:20-41 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCM64PC64SG66 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium |
| MCM64PC64TSG66 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium |
| MCM64PD32 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium |
| MCM64PD32SG66 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium |
| MCM64PD64SG66 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium |
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