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參數資料
| 型號： | MCM6926A |
| 廠商： | Motorola, Inc. |
| 英文描述： | 128K x 9 Bit Fast Static Random Access Memory |
| 中文描述： | 128K的× 9位快速靜態隨機存取存儲器 |
| 文件頁數： | 7/8頁 |
| 文件大小： | 122K |
| 代理商： | MCM6926A |
MCM6926A
7
MOTOROLA FAST SRAM
WRITE CYCLE 2
(E Controlled, See Notes 1 and 2)
Parameter
Symbol
b l
6926A–8
6926A–10
6926A–12
6926A–15
U i
Unit
Notes
Min
Max
Min
Max
Min
Max
Min
Max
Write Cycle Time
tAVAV
tAVEL
tAVEH
tELEH,
tELWH
8
—
10
—
12
—
15
—
ns
3
Address Setup Time
0
—
0
—
0
—
0
—
ns
Address Valid to End of Write
7
—
8
—
9
—
10
—
ns
Enable to End of Write
7
—
8
—
9
—
10
—
ns
4,5
Data Valid to End of Write
tDVEH
tEHDX
tEHAX
4
—
5
—
6
—
7
—
ns
Data Hold Time
0
—
0
—
0
—
0
—
ns
Write Recovery Time
0
—
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycles.
3. All write cycle timings are referenced from the last valid address to the first transitioning address.
4. If E goes low coincident with or after W goes low, the output will remain in a high impedance condition.
5. If E goes high coincident with or before W goes high, the output will remain in a high impedance condition.
tEHDX
tDVEH
tEHAX
tELWH
tELEH
tAVEL
tAVEH
DATA VALID
tAVAV
HIGH–Z
A (ADDRESS)
W (WRITE ENABLE)
E (CHIP ENABLE)
Q (DATA OUT)
D (DATA IN)
WRITE CYCLE 2
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| MCM6929A | 256K x 4 Bit Fast Static Random Access Memory |
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| MCM6929AWJ12R | 256K x 4 Bit Fast Static Random Access Memory |
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相關代理商/技術參數 |
參數描述 |
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| MCM6926AWJ12 | 制造商:Motorola Inc 功能描述:Static RAM, 128Kx8, 32 Pin, Plastic, SOJ |
| MCM6929A | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256K x 4 Bit Fast Static Random Access Memory |
| MCM6929AWJ10 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256K x 4 Bit Fast Static Random Access Memory |
| MCM6929AWJ10R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256K x 4 Bit Fast Static Random Access Memory |
| MCM6929AWJ12 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:256K x 4 Bit Fast Static Random Access Memory |
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