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參數資料
| 型號： | MCM69L738AZP9.5 |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT06; Number of Contacts:4; Connector Shell Size:8; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight |
| 中文描述： | 128K X 36 CACHE SRAM, 9.5 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119 |
| 文件頁數： | 6/20頁 |
| 文件大小： | 212K |
| 代理商： | MCM69L738AZP9.5 |
MCM69L738A
MCM69L820A
6
MOTOROLA FAST SRAM
DC OPERATING CONDITIONS AND CHARACTERISTICS
(0
°
C
≤
TA
≤
70
°
C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
(See Notes 1 through 4)
Parameter
Symbol
Min
Typical
–8.5
Typical
–9
Typical
–9.5
Max
Unit
Notes
Core Power Supply Voltage
VDD
VDDQ
IDD1
3.15
—
—
—
3.6
V
Output Driver Supply Voltage
2.3
—
—
—
2.7
V
Active Power Supply Current
(x18)
(x36)
—
—
320
370
320
370
300
350
480
550
mA
5
Quiescent Active Power Supply Current
IDD2
ISB1
ISB2
ISB3
—
180
180
180
250
mA
6, 10
Active Standby Power Supply Current
—
170
170
170
250
mA
7
Quiescent Standby Power Supply Current
—
150
150
150
230
mA
8, 10
Sleep Mode Power Supply Current
—
30
30
30
50
mA
9, 10
NOTES:
1. All data sheet parameters specified to full range of VDD unless otherwise noted. All voltages are referenced to voltage applied to VSS bumps.
2. Supply voltage applied to VDD connections.
3. Supply voltage applied to VDDQ connections.
4. All power supply currents measured with outputs open or deselected.
5. VDD = VDD (max), tKHKH = tKHKH (min), SS registered active, 50% read cycles.
6. VDD = VDD (max), tKHKH = dc, SS registered active.
7. VDD = VDD (max), tKHKH = tKHKH (min), SS registered inactive.
8. VDD = VDD (max), tKHKH = dc, SS registered inactive. ZZ low.
9. VDD = VDD (max), tKHKH = dc, SS registered inactive, ZZ high.
10. 200 mV
≥
Vin
≥
VDDQ – 200 mV.
DC INPUT CHARACTERISTICS
Parameter
Symbol
Min
Max
Unit
Notes
DC Input Logic High
VIH (dc)
VIL (dc)
Ilkg
Iclkg
Vin
VDIF(dc)
VCM(dc)
1.7
VDD + 0.3
0.7
V
DC Input Logic Low
– 0.3
V
1
Input Leakage Current
—
±
5
μ
A
2
Clock Input Leakage Current
—
±
8
μ
A
2
Clock Input Signal Voltage
– 0.3
VDD + 0.3
VDD + 0.6
2.1
V
Clock Input Differential Voltage
0.2
V
3
Clock Input Common Mode Voltage Range (See Figure 3)
1.1
V
4
NOTES:
1. Inputs may undershoot to – 0.5 V (peak) for up to 20% tKHKH (e.g., 2 ns at a clock cycle time of 10 ns).
2. 0 V
≤
Vin
≤
VDD for all pins.
3. Minimum instantaneous differential input voltage required for differential input clock operation.
4. Maximum rejectable common mode input voltage variation.
DC OUTPUT CHARACTERISTICS
Parameter
Symbol
Min
Max
Unit
Notes
Output Leakage Current
Ilkg
VOL
VOH
– 1.0
1.0
μ
A
Output Low Voltage
—
0.7
V
1
Output High Voltage
1.7
—
V
2
NOTES:
1. IOL = 8.0 mA.
2. IOH = – 8.0 mA.
CAPACITANCE
(f = 1.0 MHz, dV = 3.0 V, 0
°
C
≤
TA
≤
70
°
C, Periodically Sampled Rather Than 100% Tested)
Characteristic
Symbol
Typ
Max
Unit
Input Capacitance
Cin
CI/O
CCK
5
5
pF
Input/Output Capacitance
6
8
pF
CK, CK Capacitance
6
7
pF
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相關代理商/技術參數 |
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|---|---|
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