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參數資料
| 型號： | MCTV35P60F1D |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 晶閘管 |
| 英文描述： | 35A, 600V P-Type MOS Controlled Thyristor (MCT) with Anti-Parallel Diode |
| 中文描述： | 60 A, 600 V, P-CH MOS CONTROLLED THYRISTOR, TO-247 |
| 封裝： | TO-247, 5 PIN |
| 文件頁數： | 1/5頁 |
| 文件大小： | 53K |
| 代理商： | MCTV35P60F1D |
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright
Harris Corporation 1999
2-8
Semiconductor
MCTV35P60F1D
35A, 600V P-Type MOS Controlled
Thyristor (MCT) with Anti-Parallel Diode
Package
JEDEC STYLE TO-247
Symbol
AAKGR
G
G
A
K
Features
35A, -600V
V
TM
= -1.35V (Max) at I = 35A and +150
o
C
800A Surge Current Capability
800A/
μ
s di/dt Capability
MOS Insulated Gate Control
50A Gate Turn-Off Capability at +150
o
C
Anti-Parallel Diode
Description
The MCT is an MOS Controlled Thyristor designed for switch-
ing currents on and off by negative and positive pulsed control
of an insulated MOS gate. It is designed for use in motor con-
trols, inverters, line switches and other power switching appli-
cations. The MCT is especially suited for resonant (zero
voltage or zero current switching) applications. The SCR like
forward drop greatly reduces conduction power loss.
MCTs allow the control of high power circuits with very small
amounts of input energy. They feature the high peak current
capability common to SCR type thyristors, and operate at
junction temperatures up to +150
o
C with active switching.
This device features a discrete anti-parallel diode that shunts
current around the MCT in the reverse direction without
introducing carriers into the depletion region.
Formerly developmental type TA9789 (MCT) and TA49054
(diode).
PART NUMBER INFORMATION
PART NUMBER
PACKAGE
BRAND
MCTV35P60F1D
TO-247
M35P60F1D
NOTE: When ordering, use the entire part number.
April 1999
Absolute Maximum Ratings
T
C
= +25
o
C, Unless Otherwise Specified
MCTV35P60F1D
-600
UNITS
V
Peak Off-State Voltage (See Figure 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DRM
Continuous Cathode Current (See Figure 2)
T
C
= +25
o
C (Package Limited). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
K25
T
C
= +90
o
C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
K115
Non-repetitive Peak Cathode Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
KSM
Peak Controllable Current (See Figure 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
KC
Gate-Anode Voltage (Continuous). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GA1
Gate-Anode Voltage (Peak). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GAM
Rate of Change of Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dv/dt
Rate of Change of Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .di/dt
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
T
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
(0.063" (1.6mm) from case for 10s)
NOTE: 1. Maximum Pulse Width of 250
μ
s (Half Sine) Assume T
J
(Initial) = +90
o
C and T
J
(Final) = T
J
(Max) = +150
o
C
60
35
800
50
±
20
±
25
A
A
A
A
V
V
SeeFigure11
800
178
1.43
-55 to +150
260
A/
μ
s
W
W/
o
C
o
C
o
C
File Number
3694.4
PART WITHDRAWN
PROCESS OBSOLETE - NO NEW DESIGNS
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