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參數(shù)資料
型號(hào): MH32S64PFJ-7L
廠商: Mitsubishi Electric Corporation
英文描述: 2147483648-BIT (33554432 - WORD BY 64-BIT)SynchronousDRAM
中文描述: 2147483648位(33554432 -文字,64位)SynchronousDRAM
文件頁(yè)數(shù): 1/55頁(yè)
文件大小: 700K
代理商: MH32S64PFJ-7L
MITSUBISHI LSIs
(
/ 55 )
MITSUBISHI
ELECTRIC
16.Mar.2000
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0358-0.2
MH32S64APFB -7,-8
2147483648-BIT (33554432 - WORD BY 64-BIT)SynchronousDRAM
1
DESCRIPTION
The MH32S64APFB is 33554432 - word by 64-bit
Synchronous DRAM module. This consists of
sixteen industry standard 16Mx8 Synchronous
DRAMs in Small TSOP and one industory
standard EEPROM in TSSOP.
The mounting of Small TSOP on a card edge
Dual Inline package provides any application
where high densities and large quantities of
memory are required.
This is a socket type - memory modules, suitable
for easy interchange or addition of modules.
FEATURES
Clock frequency 100MHz(max.)
single 3.3V±0.3V power supply
Fully synchronous operation referenced to clock rising
edge
Burst length- 1/2/4/8/Full Page(programmable)
4 bank operation controlled by BA0,1(Bank Address)
/CAS latency- 2/3(programmable)
APPLICATION
main memory or graphic memory in computer systems
Auto precharge / All bank precharge controlled by A10
Burst type- sequential / interleave(programmable)
Column access - random
LVTTL Interface
Auto refresh and Self refresh
4096 refresh cycle /64ms
Utilizes industry standard 16M x 8 Sy nchronous DRAMs
Small TSOP and industry standard EEPROM in TSSOP
144-pin (72-pin dual in-line package)
(Front)
(Back)
1
2
143
144
PCB Outline
Frequency
CLK Access Time
-8,-8L
100MHz
6.0ns(CL=3)
(Component SDRAM)
6.0ns(CL=3)
100MHz
-7,-7L
PC100 Compliant
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MH32S64PHB-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:214683648-BIT (3354432- WORD BY 64-BIT)SynchronousDRAM
MH32S64PHB-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:214683648-BIT (3354432- WORD BY 64-BIT)SynchronousDRAM
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