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參數資料
| 型號： | MH4S64BBKG-7 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
| 中文描述： | 268435456位（4194304 -文字，64位）SynchronousDRAM |
| 文件頁數： | 1/55頁 |
| 文件大?。?/td> | 586K |
| 代理商： | MH4S64BBKG-7 |
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MH4S64BLG -7,-8,-10
268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 55 )
1
MITSUBISHI
ELECTRIC
29.Oct.1998
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0227-0.5
DESCRIPTION
The MH4S64BLG is 4194304 - word by 64-bit
Synchronous DRAM module. This consists of four
industry standard 4Mx16 Synchronous DRAMs in
TSOP and one industory standard EEPROM in
TSSOP.
The mounting of TSOP on a card edge Dual Inline
package provides any application where high
densities and large quantities of memory are
required.
This is a socket type - memory modules, suitable for
easy interchange or addition of modules.
FEATURES
Clock frequency 100MHz
single 3.3V±0.3V power supply
Fully synchronous operation referenced to clock rising
edge
Burst length- 1/2/4/8/Full Page(programmable)
4 bank operation controlled by BA0,1(Bank Address)
/CAS latency- 2/3(programmable)
APPLICATION
PC main memory
Auto precharge / All bank precharge controlled by A10
Burst type- sequential / interleave(programmable)
Column access - random
LVTTL Interface
Auto refresh and Self refresh
4096 refresh cycle /64ms
1pin
10pin
11pin
40pin
41pin
84pin
F
85pin
94pin
95pin
124pin
125pin
168pin
B
Utilizes industry standard 4M x 16 Synchronous DRAMs
TSOP and industry standard EEPROM in TSSOP
168-pin (84-pin dual in-line package)
Discrete IC and module design conform to
PC100 specification.
(module Spec. Rev. 1.0 and
SPD 1.2A(-7,-8), SPD1.0(-10))
Frequency
CLK Access Time
(Component SDRAM)
-8
100MHz
100MHz
6.0ns(CL=3)
6.0ns(CL=3)
-7
-10
8.0ns(CL=3)
100MHz
相關PDF資料 |
PDF描述 |
|---|---|
| MH4S64BBKG-7L | 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
| MH4S64BBKG-8 | 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
| MH4S64DBKG-7 | 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
| MH4S64DBKG-7L | 268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
| MH4S64DBKG-8 | CAP USE W/ SERU AU OA BRN |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MH4S64BBKG-7L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
| MH4S64BBKG-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
| MH4S64BBKG-8L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
| MH4S64BKG-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
| MH4S64BKG-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:268435456-BIT (4194304 - WORD BY 64-BIT)SynchronousDRAM |
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