- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371108 > MH8S64DALD-6 (Mitsubishi Electric Corporation) 536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM PDF資料下載
參數(shù)資料
| 型號： | MH8S64DALD-6 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM |
| 中文描述： | 536870912位（8388608 -文字，64位）同步DRAM |
| 文件頁數(shù)： | 1/55頁 |
| 文件大小： | 588K |
| 代理商： | MH8S64DALD-6 |
當(dāng)前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁
MH8S64PHC -7,-8,-10
536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( / 55 )
1
MITSUBISHI
ELECTRIC
9/ Dec. /1998
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0282-0.0
DESCRIPTION
The MH8S64PHC is 8388608 - word by 64-bit
Synchronous DRAM module. This consists of four
industry standard 8Mx16 Synchronous DRAMs in
TSOP and one industory standard EEPROM in
TSSOP.
The mounting of TSOP on a card edge Dual Inline
package provides any application where high
densities and large quantities of memory are
required.
This is a socket type - memory modules, suitable for
easy interchange or addition of modules.
FEATURES
Clock frequency 100MHz
single 3.3V±0.3V power supply
Fully synchronous operation referenced to clock rising
edge
Burst length- 1/2/4/8/Full Page(programmable)
4 bank operation controlled by BA0,1(Bank Address)
/CAS latency- 2/3(programmable)
APPLICATION
PC main memory
Auto precharge / All bank precharge controlled by A10
Burst type- sequential / interleave(programmable)
Column access - random
LVTTL Interface
Auto refresh and Self refresh
4096 refresh cycle /64ms
1pin
10pin
11pin
40pin
41pin
84pin
F
85pin
94pin
95pin
124pin
125pin
168pin
B
Utilizes industry standard 8M x 16 Synchronous DRAMs
TSOP and industry standard EEPROM in TSSOP
168-pin (84-pin dual in-line package)
Discrete IC and module design conform to
PC100 specification.
(module Spec. Rev. 1.0 and
SPD 1.2A(-7,-8), SPD1.0(-10))
Frequency
CLK Access Time
(Component SDRAM)
-8
100MHz
100MHz
6.0ns(CL=3)
6.0ns(CL=3)
-7
-10
8.0ns(CL=3)
100MHz
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MH8S64DALD-7 | 536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM |
| MH8S64DALD-8 | 536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM |
| MH8S64DBKG-6 | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-6L | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-7 | 536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MH8S64DALD-7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM |
| MH8S64DALD-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM |
| MH8S64DBKG-6 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-6L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
| MH8S64DBKG-7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。