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參數資料
型號: MIC280-7BM6 TR
廠商: Micrel Inc
文件頁數: 8/23頁
文件大小: 385K
描述: IC SUPERVISOR THERMAL SOT23-6
標準包裝: 3,000
系列: IttyBitty®
功能: 溫度監控系統(傳感器)
傳感器類型: 內部和外部
感應溫度: -55°C ~ 125°C,外部傳感器
精確度: ±2°C(最小值)
拓撲: ADC,寄存器庫
輸出類型: SMBus?
輸出警報:
輸出風扇:
電源電壓: 3 V ~ 3.6 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-6
供應商設備封裝: SOT-23-6
包裝: 帶卷 (TR)
其它名稱: MIC280-7BM6TR
MIC280-7BM6TR-ND
MIC280
Micrel
MIC280
8
May 2006
(D7) represents the sign: zero for positive temperatures and
one for negative temperatures. Table 3 shows examples of
the data format used by the MIC280 for temperatures:
Temperature
Binary
Hex
 
+127癈
0111 1111
7F
 
+125癈
0111 1101
7D
 
+25癈
0001 1001
19
 
+1癈
0000 0001
01
 
0癈
0000 0000
00
 
1癈
1111 1111
FF
 
25癈
1110 0111
E7
 
125癈
1000 0011
83
 
128癈
1000 0000
80
Table 3: Digital Temperature Format, High Bytes
Extended temperature resolution is provided for the external
zone. The high and low temperature limits and the measured
temperature for zone one are reported as 12-bit values stored
in a pair of 8-bit registers. The measured temperature, for
example, is reported in registers TEMP1h, the high-order byte,
and TEMP1l, the low-order byte. The values in the low-order
bytes are left-justied four-bit binary values representing
one-sixteenth degree increments. The A-D converter resolu-
tion for zone 1 is selectable from nine to twelve bits via the
conguration register. Low-order bits beyond the resolution
selected will be reported as zeroes. Examples of this format
are shown below in Table 4.
FAULT QUEUE
A set of fault queues (programmable digital lters) are pro-
vided in the MIC280 to prevent false tripping due to thermal
or electrical noise. Two bits, CONFIG[5:4], set the depth of
the fault queues. The fault queue setting then determines
the number of consecutive temperature events (TEMPx >
THIGHx or TEMPx < TLOWx) which must occur in order for
the condition to be considered valid. As an example, as-
sume CONFIG[5:4] is programmed with 10b. The measured
temperature for a given zone would have to exceed THIGHx
for four consecutive A/D conversions before /INT would be
asserted or the status bit set.
Like any lter, the fault queue function also has the effect
of delaying the detection of temperature events. In this ex-
ample, it would take 4 x t
CONV
 to detect a temperature event.
The fault queue depth vs. CONFIG[5:4] of the conguration
register is shown in Table 5. Note: there is no fault queue
for over-temperature events (CRIT0 and CRIT1) or diode
faults. The fault queue applies only to high-temperature and
low-temperature events as determined by the THIGHx and
TLOWx registers. Any write to CONFIG will result in the fault
queues being purged and reset. Writes to any of the limit
registers, TLOWx or THIGHx, will result in the fault queue for
the corresponding zone being purged and reset.
CONFIG[5:4]
FAULT QUEUE
 
 
DEPTH
 
00
1 (Default)
 
01
2
 
10
4
 
11
6
Table 5: Fault Queue Depth Settings
Interrupt Generation
There are eight different conditions that will cause the MIC280
to set one of the bits in STATUS and assert its /INT output,
if so enabled. These conditions are listed in Table 6. Unlike
previous generations of thermal supervisor ICs, there are no
interdependencies between any of these conditions. That is,
if CONDITION is true, the MIC280 will respond accordingly,
regardless of any previous or currently pending events.
Normally when a temperature event occurs, the corresponding
status bit will be set in STATUS, the corresponding interrupt
mask bit will be cleared, and /INT will be asserted. Clearing
the interrupt mask bit(s) prohibits continuous interrupt gen-
eration while the device is being serviced. (It is possible to
prevent events from clearing interrupt mask bits by setting
bits in the lock register. See Table 7 for Lockbit function-
ality.) A temperature event will only set bits in the status
register if it is specically enabled by the corresponding bit
in the interrupt mask register. An interrupt signal will only
be generated on /INT if interrupts are also globally enabled
(IE =1 in CONFIG).
The MIC280 expects to be interrogated using the Alert Re-
sponse Address once it has asserted its interrupt output. Fol-
lowing an interrupt, a successful response to the A.R.A. or a
read operation on STATUS will cause /INT to be de-asserted.
STATUS will also be cleared by the read operation. Reading
STATUS following an interrupt is an acceptable substitute for
  Extended Temperature,
Resolution
 
Low Byte
 
9 BITS
10 BITS
11 BITS
12 BITS
 
 
Binary
Hex
Binary
Hex
Binary
Hex
Binary
Hex
 
0.0000
0000 0000
00
0000 0000
00
0000 0000
00
0000 0000
00
 
0.0625
0000 0000
00
0000 0000
00
0000 0000
00
0001 0000
10
 
0.1250
0000 0000
00
0000 0000
00
0010 0000
20
0010 0000
20
 
0.2500
0000 0000
00
0100 0000
40
0100 0000
40
0100 0000
40
 
0.5625
1000 0000
80
1000 0000
80
1000 0000
80
1001 0000
90
 
0.9375
1000 0000
80
1100 0000
C0
1110 0000
E0
1111 0000
F0
Table 4: Digital Temperature Format, Low Bytes
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