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參數(shù)資料
型號(hào): ML4824IS1X
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 1/15頁(yè)
文件大小: 103K
描述: IC PFC CTRLR AVERAGE CURR 16SOIC
標(biāo)準(zhǔn)包裝: 1,000
模式: 平均電流
頻率 - 開關(guān): 76kHz
電流 - 啟動(dòng): 700µA
電源電壓: 10.5 V ~ 13.2 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
 
 
www.fairchildsemi.com
 
REV. 1.0.6 11/7/03
 
Features
 
"  Internally synchronized PFC and PWM in one IC
"  Low total harmonic distortion
"  Reduces ripple current in the storage capacitor between
the PFC and PWM sections
"  Average current, continuous boost leading edge PFC
"  Fast transconductance error amp for voltage loop
"  High efciency trailing edge PWM can be congured for
current mode or voltage mode operation
"  Average line voltage compensation with brownout
control
"  PFC overvoltage comparator eliminates output
runaway due to load removal
"  Current fed gain modulator for improved noise immunity
"  Overvoltage protection, UVLO, and soft start
 
General Description
 
The ML4824 is a controller for power factor corrected,
switched mode power supplies. Power Factor Correction
(PFC) allows the use of smaller, lower cost bulk capacitors,
reduces power line loading and stress on the switching FETs,
and results in a power supply that fully complies with
IEC1000-2-3 specication. The ML4824 includes circuits
for the implementation of a leading edge, average current,
boost type power factor correction and a trailing edge,
pulse width modulator (PWM).
The device is available in two versions; the ML4824-1 (f
 
PWM
 
 
= f
 
PFC
 
) and the ML4824-2 (f
 
PWM
 
 = 2 x f
 
PFC
 
). Doubling the
switching frequency of the PWM allows the user to design
with smaller output components while maintaining the best
operating frequency for the PFC. An over-voltage compara-
tor shuts down the PFC section in the event of a sudden
decrease in load. The PFC section also includes peak current
limiting and input voltage brown-out protection. The PWM
section can be operated in current or voltage mode at up to
250kHz and includes a duty cycle limit to prevent trans-
former saturation.
 
Block Diagram
15
VEAO
IEAO
V
FB
I
AC
V
RMS
I
SENSE
RAMP 1
OSCILLATOR
OVP
PFC I
LIMIT
UVLO
V
REF
PULSE WIDTH MODULATOR
POWER FACTOR CORRECTOR
2.5V
+


+
16
2
4
3
7.5V
REFERENCE
14
V
CC
13
V
CCZ
VEA
7
+

IEA
1
+

+

PFC OUT
12
S
R
Q
Q
S
R
Q
Q
2.7V
1V
RAMP 2
8
PWM OUT
11
S
R
Q
Q
V
DC
6
SS
5
DC I
LIMIT
9
V
CC
DUTY CYCLE
LIMIT

+
1V

+
2.5V
V
FB

+
8V
8V
V
IN
 OK
GAIN
MODULATOR
V
CCZ
x 2
(-2 VERSION ONLY)
3.5k&
3.5k&
1.25V
50礎(chǔ)

+
13.5V
DC I
LIMIT
 
ML4824
 
Power Factor Correction and PWM Controller
Combo
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