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參數資料
| 型號： | MM5035N |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal 80-Bit Static Shift Register |
| 中文描述： | 80-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 108K |
| 代理商： | MM5035N |
TL/F/10821
M
April 1990
MM5034/MM5035
Octal 80-Bit Static Shift Register
General Description
The MM5034 octal 80-bit shift register is a monolithic MOS
integrated circuit utilizing N-channel low threshold enhance-
ment mode and ion-implanted depletion mode devices.
The MM5034 is designed for use in computer display pe-
ripherals. All inputs and outputs are TTL compatible. The
clocks and recirculate logic are internal to reduce system
component count, and TRI-STATE
é
output buffers provide
bus interface. Because of its N-channel characteristics, sin-
gle 5V power supply operation is required.
Simple interface to the NSC CRT DP8350 controller and
character generator to incorporate an entire CRT terminal is
feasible with the MM5034.
The MM5034 is available in a 22-lead dual-in-line package.
The MM5035 is a 20-pin version of the MM5034 with the
TRI-STATE output select feature omitted, for a simple data
in/data out operation.
Features
Y
Single 5V power supply
Y
Internal clocks
Y
High speed and static operation
Y
TRI-STATE output buffer
Y
Recirculate and outut select independent
Y
TTL compatible
Applications
Y
CRT displays
Y
Computer peripherals
Connection Diagrams
Dual-In-Line Package
TL/F/10821–1
Top View
Order Number MM5034N
See NS Package Number N22A
Dual-In-Line Package
TL/F/10821–2
Top View
Order Number MM5035N
See NS Package Number N20A
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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