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參數資料
| 型號： | MM54240N |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Asynchronous Receiver/Transmitter Remote Controller |
| 中文描述： | 異步接收器/發射器遙控器 |
| 文件頁數： | 4/10頁 |
| 文件大小： | 187K |
| 代理商： | MM54240N |
Circuit Description
(Continued)
Slave Circuit Logic Flow Diagram
TL/F/10819–5
Specialized Output Options for Slave Circuits
C1
C2
Description
1
0
0
1
1
0
All 8 Pins are High Impedance Input Ports
All 8 Pins are Standard Low Impedance Output Ports
D1–D4 are Standard Low Impedance Output Ports
D5–D8 are High Impedance Input Ports
Logic ‘‘0’’ Outputs are Low Impedance Output Ports
Logic ‘‘1’’ Outputs are Weak Pull-Ups to V
DD
1
0
*
In this option, the slave data ports can be connected in a wired-OR configuration with open-col-
lector or open-drain outputs on the peripheral.
Master Circuit Logic Flow Diagram
TL/F/10819–6
Master Configuration State Chart
Status Register
Description
D2
D1
D0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Not Used
In Process of Transmitting to Slave during Write Slave Mode
Valid Data Received from Slave
Not Used
Awaiting Data from Slave during Read Slave Mode
In Process of Transmitting to Slave during Read Slave Mode
Invalid Data Received from Slave
*
Initialization/Idle Condition
*
This state is entered if address or parity do not match.
4
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