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參數(shù)資料
| 型號： | MM54C42N |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | BCD-to-Decimal Decoder |
| 中文描述： | CMOS SERIES, DECIMAL DECODER/DRIVER, INVERTED OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大小： | 107K |
| 代理商： | MM54C42N |
TL/F/5882
M
March 1988
MM54C42/MM74C42 BCD-to-Decimal Decoder
General Description
The MM54C42/MM74C42 one-of-ten decoder is a mono-
lithic complementary MOS (CMOS) integrated circuit con-
structed with N- and P-channel enhancement transistors.
This decoder produces a logical ‘‘0’’ at the output corre-
sponding to a four bit binary input from zero to nine, and a
logical ‘‘1’’ at the other outputs. For binary inputs from ten to
fifteen all outputs are logical ‘‘1’’.
Features
Y
Supply voltage range
3V to 15V
Y
Tenth power TTL
compatible
drive 2 LPTTL loads
Y
High noise immunity
0.45 V
CC
(typ.)
50 nW (typ.)
10 MHz (typ.)
with 10V V
CC
Y
Low power
Y
Medium speed operation
Applications
Y
Automotive
Y
Alarm systems
Y
Data terminals
Y
Industrial electronics
Y
Instrumentation
Y
Remote metering
Y
Medical electronics
Y
Computers
Schematic Diagram
TL/F/5882–1
Truth Table
Inputs
Outputs
D
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
C
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
3
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
4
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
5
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
6
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
7
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
8
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
9
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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