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參數資料
| 型號： | MM54C90N |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Bit Decade, Binary Counter |
| 中文描述： | CMOS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數： | 1/6頁 |
| 文件大?。?/td> | 124K |
| 代理商： | MM54C90N |
TL/F/5889
M
M
February 1988
MM54C90/MM74C90 4-Bit Decade Counter
MM54C93/MM74C93 4-Bit Binary Counter
General Description
The
MM54C90/MM74C90
MM54C93/MM74C93 binary counter and complementary
MOS (CMOS) integrated circuits constructed with N- and
P-channel enhancement mode transistors. The 4-bit decade
counter can reset to zero or preset to nine by applying ap-
propriate logic level on the R
01
, R
02
, R
91
and R
92
inputs.
Also, a separate flip-flop on the A-bit enables the user to
operate it as a divide-by-2, 5 or 10 frequency counter. The
4-bit binary counter can be reset to zero by applying high
logic level on inputs R
01
and R
02
, and a separate flip-flop on
the A-bit enables the user to operate it as a divide-by-2, -8,
or -16 divider. Counting occurs on the negative going edge
of the input pulse.
decade
counter
and
the
All inputs are protected against static discharge damage.
Features
Y
Wide supply voltage range
3V to 15V
Y
Guaranteed noise margin
1V
Y
High noise immunity
0.45 V
CC
(typ.)
Fan out of 2
driving 74L
the
MM54L93/
Y
Low power
TTL compatiblity
MM54C93/MM74C93
MM74L93 Pinout
Y
The
follows
Connection and Logic Diagrams
MM54C90/MM74C90
Dual-In-Line Package
TL/F/5889–2
Top View
MM54C93/MM74C93
Dual-In-Line Package
TL/F/5889–4
Top View
Order Number MM54C90 or MM74C93
M54C90/MM74C90
TL/F/5889–1
MM54C93/MM74C93
TL/F/5889–3
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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