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參數資料
| 型號： | MM74C932N |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | Phase Comparator |
| 中文描述： | PHASE DETECTOR, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁數： | 1/6頁 |
| 文件大小： | 121K |
| 代理商： | MM74C932N |
TL/F/5921
M
February 1988
MM54C932/MM74C932 Phase Comparator
General Description
The MM74C932/MM54C932 consists of two independent
output phase comparator circuits. The two phase compara-
tors have a common signal input and a common comparator
input. The signal input can be directly coupled for a large
voltage signal, or capacitively coupled to the self-biasing
amplifier at the signal input for a small voltage signal.
Phase comparator I, an exclusive-OR gate, provides a digi-
tal error signal (phase comp. I out) and maintains 90
§
phase
shifts at the VCO center frequency. Between signal input
and comparator input (both at 50% duty cycle), it may lock
onto the signal input frequencies that are close to harmon-
ics of the VCO center frequency.
Phase comparator II is an edge-controlled digital memory
network. It provides a digital error signal (phase comp. II
out) and lock in signal (phase pulses) to indicate a locked
condition and maintains a 0
§
phase shift between signal in-
put and comparator input.
Features
Y
Wide supply voltage range
Y
Convenient mini-DIP package
Y
TRI-STATE
é
phase-comparator output (comparator II)
Y
200 mV input voltage (signal in) sensitivity (typical)
Block and Connection Diagrams
TL/F/5921–1
Dual-In-Line Package
TL/F/5921–2
Top View
Order Number MM54C932 or MM74C932
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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